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Source.rar
- PWM Verilog源代码，可以通过仿真测试,PWM Verilog source code, can be tested through simulation
pwm
- pwm的占空比和死区时间可调的Verilog HDL程序设计和测试-duty cycle of pwm and adjustable dead time of the Verilog HDL design and testing procedures
FPGA_PWM
- 用Verilog语言编写的FPGA控制PWM的程序.利用码盘脉冲进行调速,进行过简单试验,可用.没有经过长期验证.做简单修改即可应用!-Using Verilog languages FPGA control PWM procedures. Using pulse code disk for governor, conducted a simple test that can be used. Not after a long-term verification. To do a simple
fpga-pwm
- 用verilog 语言写的FPGA子程序，环境是quartus II 7.2 已经在EP1C6Q240上测试过，源码包含仿真文件和仿真结果，本程序可以直接嵌入做子程序使用。-FPGA with the verilog language written subroutines, the environment is quartus II 7.2 has been tested on EP1C6Q240, source code contains the simulation files and s
lai_PWM
- FPGA下PWM的Verilog 源码，含目标程序，可直接下载使用，可用在电机控制中-FPGA in Verilog source code under the PWM, including the target program, can be directly downloaded to use, can be used in motor control in
pmw2ppm
- Vhdl code PPM to pwm converte
pwm_gen
- PWM _Generator VHDL code
test4
- 用 vhdl 语言实现的 32个 条目的 ARP-using vhdl language to realize ARP protocol with 32 entries
pwm
- PWM脉冲产生代码，程序采用VHDL硬件描述语言！很有参考价值-PWM pulse generation code, the program using VHDL hardware descr iption language! Useful reference
pwm_timer
- PWM和Timer的FPGA实现，文档代码齐全。-PWM and Timer for FPGA implementation, documentation, code complete.
PWM
- PWM Source Code in VHDL For FPGA Devices
pwm
- FPGA控制的 PWM LED程序 较为复杂 有助于新手进阶参考-FPGA PWM LED control is more complicated procedures will help novices Advanced Reference
samlecode.vhdl
- This document lists the basic function of a vhdl code including the entity and ending with archetecture. Also it has a sample code of pwm vs sigma delta signals output.
samlecode.vhdl
- THis code describes how to use the pwm singal generator and how to generate this using VHDL>
pwm
- vhdl的pwm代码可以控制LED的亮度255级调节 -The pwm vhdl code
pwm
- 适合初学者对PWM调制的学习，解释比较明确，由于来元于核心程序，功能强大-Enables the keyboard scan code in Verilog source code, clear for beginners Comments
PWM
- 数控脉宽正负调制信号发生器vhdl程序代码-Positive and negative pulse width modulated digital signal generator vhdl code
PWM-waves-generated-module-VHDL-code
- 此为基于FPGA的直流伺服系统的设计，具体为PWM波生成模块的VHDL代码-This is the dc servo system based on FPGA design, specific for PWM waves generated module VHDL code
PWM-IS
- control Pulse width modulation (PWM) using VHDL code and Block schematic.the selection switch at the FPGA board is important to control the duty cycle of PWM.For example application that can be used is to control speed dc motor.-control Pulse width m
PWM
- VHDL code for PWM Generator with Variable Duty Cycle