搜索资源列表
circularbuffer
- Circular_Buffer，流水线型多位缓存器，verilog语言描述。通过modelsim 6。0仿真，quartus 综合通过。
89_full_adder
- full adder设计代码，verilog 语言描述，通过modelsim 仿真，quartus综合
Modelsim
- 不错的Quartus II 与modelsim结合仿真简介笔记，较为适合初学者，希望对大家有帮助！
Quartus_fft_ip_core.rar
- Quartus中fft ip core的使用(modelsim 仿真FFT ip core 结合QUARTUS II 联合调试),Fft ip core in Quartus use (modelsim simulation FFT ip core integration QUARTUS II Joint Commissioning)
UART
- 语言：verilog语言 功能：通过串口控制模块，实现FPGA与串口 通信。 仿真环境：modelsim 综合环境：quartus -Language: verilog language function: through the serial port control module, FPGA and serial communication. Simulation Environment: modelsim integrated environment: quartu
Modelsim
- modelsim 的使用具体方法与步骤 以及与Quartus联合仿真-ModelSim the use of specific methods and procedures, as well as a joint simulation with the Quartus
QuartusIIandModelSim
- 本文主要描述了如何在QUARTUS II 中输入程序文件，生成网表及标准延时文件，然后通过 MODELSIM进行功能仿真与后仿真的过程，主要为图解，含全部代码及仿真波形。 -This article describes how to enter at QUARTUS II program file, generate netlists and standard delay file, and then through the ModelSim for functional simulation
Quartus_II_called_ModelSim_simulation
- BJ-EPM240V2实验例程以及说明文档实验之十五Quartus II调用ModelSim仿真实例-BJ-EPM240V2 experimental test routines as well as documentation of the Quartus II 15 ModelSim simulation calls
a
- 讲述了如何使用ModelSim与Quartus结合进行时序仿真 -Describes how to use ModelSim for timing simulation combined with the Quartus
dds
- 在quartus下的DDS设计，Verilog语言，可以产生正弦波、三角波、方波等，频率可调。-Under the DDS in quartus design, Verilog language, you can produce sine wave, triangle wave, square wave, frequency adjustable.
I2C
- 语言：verilog 功能：用Verilog HDL编写的I2C主机串行通信的程序。两条总线线路：一条串行数据线 SDA， 一条串行时钟线 SCL；串行的 8 位双向数据传输位速率在标准模式下可达 100kbit/s，快速模式下可达 400kbit/s ，高速模式下可达 3.4Mbit/s；在数据传输过程中，当时钟线为高电平时，数据线必须保持稳定。如果时钟线为高电平时数据线电平发生变化，会被认为是控制信号。 仿真工具：modelsim 综合工具：quartus -Language:
quartus-and-modelsim-for-OFDM
- 关于quartus与modelsim 仿真-about quartus and modelsim simulator
FPGA-realise-the-SPI-code
- 用verilog实现的SPI程序，还在modelsim中编写了testbetch文件，非常适合初学者做SPI实验，做一遍包括quartus应用及modelsim仿真都会了-Implementation of SPI with verilog program, also write the testbetch modelsim file, ideal for beginners to do SPI experiment, do it again, including quartus and mod
AdderE-modelSim
- 全加器ModelSim工程，modelsim的仿真模型，在quartus下可运行-Full adder ModelSim project, modelsim simulation model can be run under the quartus
ModelSim-Settings
- 设置ModelSim仿真步骤,运用Quartus II 13.0 (32-bit) University Program VWF 波形文件编程功能后，使用ModelSim-Altera进行仿真。-Set ModelSim simulation steps, using Quartus II 13.0 (32-bit) University Program VWF programming function waveform file, use the ModelSim-Altera simulat
verilog-hdl(Quartus)
- 一个关于Quartusii的软件使用教程，包括Modelsim的仿真教程，比较简单-About Quartusii software tutorials, including Modelsim simulation tutorial, relatively simple
ASI_simulation
- 异步串行接口ASI仿真设计,quartus modelsim 仿真参考设计，实现ASI传输，完成8b/10b转换，串并转换-Asynchronous Serial Interface ASI simulation design, quartus modelsim simulation reference design, implementation ASI transmission, complete 8b/10b conversion, serial-parallel conversion
HEX2MIF
- QUARTUS II SRAM/ROM初始化需要的HEX文件与Keil产生的HEX格式不同；该Modelsim程序，将Keil产生的Hex转换成，Quartus可以是识别的MIF格式；(The QUARTUS II SRAM/ROM initialization needs HEX files which are different from those generated by Keil. The Modelsim program converts Hex generated by Keil
quartus和modelsim中使用mif和hex文件1
- quartus和modelsim中使用mif和hex文件1(fpga modelsim mif hex)