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  1. altera_up_avalon_sd_card_inter

    1下载:
  2. 基于VHDL的sdip核,Altera公司推出的大学计划!最新版本9.0,VHDL-based ip core of the sd card, Altera' s university program launched! The latest version 9.0
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-02
    • 文件大小:257.67kb
    • 提供者:兔子
  1. sd_card

    0下载:
  2. 面向altera公司的大学计划sd-card ip核,检测sd卡是否插入卡槽中。-Altera company s University Program for sd-card ip core, testing sd card is inserted into the card slot
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-05-08
    • 文件大小:1.57mb
    • 提供者:陈小林
  1. spimaster

    0下载:
  2. SPI ip core supporting sd/MMC
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-05-10
    • 文件大小:2.16mb
    • 提供者:zhanglh
  1. sd_slave_device

    3下载:
  2. verilog source code for sd card SLAVE DEVICE ip-core
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2016-01-27
    • 文件大小:14.58kb
    • 提供者:Antti Lukats
  1. sdcard_mass_storage_controller_latest.tar

    1下载:
  2. 基于wishbone总线的sd Card ip core,有Verilog和VHDL两种语言版本,包含了FIFO和DMA两种实现方式,是开源的ip core-Based on the wishbone bus sd Card ip core, there are two language versions of Verilog and VHDL, including the FIFO and DMA implemented in two ways, is open source ip core
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-05-10
    • 文件大小:2.17mb
    • 提供者:张亚群
  1. RD1088_rev01.2

    1下载:
  2. FPGA或CPLD读取sd卡的ip核,基于wishbone接口,支持sdHC2.0,包含了使用说明,为Verilog语言编写-FPGA or CPLD reads the sd card ip core, based on the wishbone interface, support sdHC2.0, contains instructions for the Verilog language
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2014-10-03
    • 文件大小:1.34mb
    • 提供者:andy
  1. sd_card_controller_latest.tar

    0下载:
  2. The sd Card Controller ip core is MMC/sd communication controller designed to be used in a System-on-Chip. The ip core provides a simple interface for CPU. The communication between the MMC/sd card controller and MMC/sd card is performed accord
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-05-11
    • 文件大小:2.18mb
    • 提供者:xugongyi
  1. sd_controller.v

    0下载:
  2. sd卡的ip核,Verilog代码编写,与MCU挂载后实现sd卡的读写数据。-sd card ip core,programmed by verilog,link to MCU can R/W data to the sd card.
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-16
    • 文件大小:231.31kb
    • 提供者:王景民
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