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- 本文介绍了基于FPGA的数字频率计的设计方法，设计采用硬件描述语言Verilog ，在软件开发平台ISE上完成，可以在较高速时钟频率（48MHz）下正常工作。该数字频率计采用测频的方法，能准确的测量频率在10Hz到100MHz之间的信号。-This article describes the FPGA-based digital frequency meter design method using hardware descr iption language Verilog, ISE on t
fre_counter
- 用verilog实现的确数字频率计,内部含有各个功能模块-Verilog implementation is actually using digital frequency meter
freqency
- verilog语言 写的 频率计 ，可在1602液晶上显示，代码齐全，经过验证。-verilog language written in the frequency meter can be displayed on the LCD in 1602, code complete, proven.
plj_book
- EDA，verilog 语言写的频率计，一个是测频，一个是产生一定的频率作为信号源，可在cycloneII 上验证，-EDA, verilog language written in frequency counter, one frequency measurement, one is a certain frequency as the signal source can be verified on the cycloneII, thank you! !
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- 等精度频率计，verilog语言写的，可在开发板上验证，已经试过-And other precision frequency meter, verilog language, and can be verified on the development board, has tried
Cymometer
- 这是本人用verilog语言做的频率计！对于硬件来说是很好的程序.-This is my language to do with verlog frequency counter!
frequence
- 基于verilog语言的频率计，大三的时候写得，我感觉不错哦-Verilog language based on the frequency meter, junior, when written, I feel good, oh
report-of-digital-pluse-counter
- 某一大学里关于数字频率计的电子实验报告,内容详尽,含verilog源码-A university on the electronic digital frequency meter test reports, and detailed, with verilog source
frequency_meterd
- 用verilog编写的一个可测1~10mhz的频率计-Verilog write with a measurable 1 ~ 10 MHZ frequency meter
freq_detect
- verilog写的数字频率计，用七段数码管显示-verilog to write the digital frequency meter
FREQ
- 该程序使用verilog编程语言，实现了频率计-The program use verilog programming language, realized the frequency meter
freq_m
- 基于FPGA的verilog语言编写的频率计-Meter based on the frequency of the FPGA verilog language
fre
- verilog hdl 开发的频率计，运行环境 DE2-115开发板，内有modelsim仿真用的testbench。RTL级代码-verilog hdl developed frequency meter, operating environment, the DE2-115 development board, modelsim simulation of the testbench. RTL-level code
sopc
- FPGA Verilog，描述频率计的制作，主要是为了提高频率计的精度，以及很多其它的-FPGA Verilog
Frequency-tester
- 数字频率计，能自动测试输入方波脉冲的频率，通过LCD1602显示，是用Verilog HDL写的-Digital frequency measurement，Can automatic testing input square wave pulse frequency, through the LCD1602 shows, it is to use Verilog HDL write
project9_freq_counter
- 数字频率计的设计,基于VERILOG的数字频率计的设计-Digital frequency plan design, based on the number of VERILOG frequency meter design
pinlvji
- 频率计能测频率 周期 高脉宽 低脉宽 频率计能测频率 周期 高脉宽 低脉宽-verilog prepared using high-speed string-type DA-chip dac121 driver code, occupation le small, high efficiency, the current I applied to more products
pinlvji
- 使用verilog语言设计一个3位十进制数字式频率计，其测量范围为1MHz，量程为10kMz,100kMz和1MMz三档（最大读数分别为：9.99kMz，99.9kMz和999kMz）-Use verilog language, design a three decimal digital frequency meter
Frequency
- 频率计，用verilog编写。语言简洁易懂。-Frequency counter, written in verilog.
012-fre_tst
- verilog写的频率计，利用在一周期内计数方式，测试可用，500KHZ以上误差大-verilog to write the frequency meter, the test can be used