搜索资源列表
Regfile
- 利用Xilinx ISE14.3，用Verilog HDL 语言编写的计算器与寄存器堆程序，在Spartan Ⅲ板上调试通过。-Use Xilinx ISE14.3, using Verilog HDL language of computers and register file program, Spartan Ⅲ board through debugging.
multi_cpu
- 用xilinx ISE 14.3开发的多周期CPU系统，开发语言为verilog HDL.仿真调试与实际测试均已通过-Using xilinx ISE 14.3 development of multi-cycle CPU system, development language for verilog HDL. Simulation debugging and practical tests have passed
cc
- 自己写的一个简单模拟电话计费功能的代码，采用Verilog，用的是Xilinx的Spartan 3E-To write a simple function analog telephone billing code, Verilog, using the Xilinx Spartan 3E
ddr3_top
- xilinx DDR verilog 控制器-DDR verilog controller FOR XILINX
map
- map verilog for xilinx
pprx
- pprx verilog for xilinx
procedure-control1
- xilinx软件编写的程控放大器程序代码，verilog语言。其中用到DA970。适合初学者。-xilinx software program code written in programmable amplifier, verilog language. Which uses DA970. Suitable for beginners.
Watch_Game_0729
- 基于xilinx virtex5的猜数游戏+LCD显示设计，包含完整的ISE工程文件，代码全部用verilog编写，有说明文档。-Based on xilinx virtex5， the guessing game plus LCD display design, including complete ISE project file, all code written in verilog, documents.
Xilinx_xapp341_uart_verilog
- Xilinx应用笔记关于UART的verilog实现方法和例子说明-Xilinx application note on the UART verilog implementation methods and examples
flipflop_d
- Xilinx Verilog D触发器 绝对好用-Xilinx Verilog D flip-flop is absolutely easy
ethernet.tar
- verilog写的以太网硬件模型，使用xilinx FPGA，ieee802.3ae-an ethernet model in Verilog，using a Xilinx FPGA，and the function：IEEE 802.3ae Media Access Control (MAC) Parameters, Physical Layers, and Management Parameters for 10 Gb/s Operation
20131010-code
- fx2lp 68013 xilinx XC3s400 实现slave fifo通讯，包括68013的固件以及fpga的代码（verilog）。摸了好久才调试通过的，特共享出来解救苍生！-fx2lp 68013 xilinx XC3s400 slave fifo
SEG7
- 基于xilinx的开发板，利用verilog语言实现扫描数码管，小键盘和计数的功能-Xilinx development board based on the use of digital scanning verilog language, keypad and counting functions
FT_LUT6_L
- Verilog of XILINX LUT6 of Xilinx-Verilog of XILINX LUT6 of Xilinx
Puzzle
- 一个用verilog编写的VGA显示拼图游戏，本程序基于Xilinx的Basys2开发板，图像存储于ROM中-A VGA display jigsaw puzzle with verilog written, the program is based on the Basys2 Xilinx development boards, the image is stored in ROM
white
- 基于verilog的VGA白屏测试程序，可在xilinx的basys2开发板上直接运行-Verilog VGA-based black and white test program can be run directly on the basys2 xilinx development board
PCIE_DMA_DDR3_verilog_design
- 基于xilinx fpga的pci-e到dma再到ddr3的数据传输完整设计-PCIE_DMA_DDR3 verilog reference design
ac701-pcie-rdf0225-2013.2-c
- 赛灵思7系列开发板ac701，PCIE参考设计，VHDL/Verilog，开发环境Vivado-xilinx 7 series design Kit AC701 PCIe reference design. VHDL/Verilog, design environment Vivado
nexta
- verilog基于XILINX SPARTAN 3ESTARTER的VGA显示功能-verilog based XILINX SPARTAN 3ESTARTER the VGA display
MUSIC
- verilog实现xilinx的音乐播放（使用蜂鸣器）-xilinx verilog realize music player (with buzzer)