搜索资源列表
uart
- 利用xilinx 公司的ise软件基于verilog HDL实现UART控制程序-based on the xilinx ise and use verilog HDL language to achieve the purposes that control the uart.
divide-freq
- 基于XILINX芯片的verilog程序。调用DCM模块，完成50MHz转换75MHz，相位偏移90°-XILINX chip based on Verilog program. Call the DCM module to complete the 50MHz conversion, 75MHz, phase shift of 90 degrees
CRC32_D8
- 循环冗余校验编码，CRC32，verilog实现，xilinx平台上验证，结果可用。-CRC coding, CRC32, verilog implementation, verification on xilinx platform, the results are available.
HWL_ASYNC_FIFO_DRAM_BA
- asynchronous fifo based on distributed RAM. xilinx fpga. VErilog language.
led_shift
- 在xilinx的ISE上写的LED灯移动的verilog程序-a verilog code for led-shifting which writed with ise 14.2
flow_led
- xilinx kc705用verilog写的流水灯程序-the program with verilog by kc705 of xilinx
sell-machine
- verilog sell machine 通过robei和vivado设计的建议xilinx测试程序，有助于学习vivado和fpga-verilog vivado xilinx
freq
- verilog 编写的频率计 管脚绑定支持Xilinx Spartan6-verilog prepared frequency meter pin binding support Xilinx Spartan6
FM_T
- 一个简单的FM调制模块，FM发射，用Verilog编写，基于Xilinx SPARTAN6 XC6LX9开发-A simple FM modulation modules for FM transmitter, using Verilog prepared, based on XILINX SPARTAN6 XC6LX9 Development
sp605PCIe
- xilinx评估板sp605的PCIe的verilog源程序(已经经过调试)-Evaluation Kit for PCIe-sp605 xilinx verilog source (which has been commissioning)
VGA
- 基于FPGA Xilinx系列，代码调试VGA的应用，采用verilog进行编程实现-Based on the FPGA Xilinx series, code debugging VGA application, use verilog programming implementation
digital_tube
- 基于FPGA Xilinx系列，代码调试数码管的应用，采用verilog进行编程实现-Based on the FPGA Xilinx series, the code debugging the application of digital tube, using verilog programming implementation
1-example_led_4
- Verilog编写的计数闪灯，FPGA实验板，Xilinx ISE实验环境-Verilog prepared by flash count, FPGA experimental board, Xilinx ISE experimental environment
1-example_led_5
- Verilog编写的移位闪灯（跑马灯），FPGA实验板，Xilinx ISE实验环境-Verilog prepared by a shift flash (marquees), FPGA experimental board, Xilinx ISE experimental environment
clk_generator
- 时钟分频的verilog代码，能够实现小数分频，文件为Xilinx ISE工程文件-Frequency clock divider verilog codes, it is possible to achieve fractional file to Xilinx ISE Project Files
vga256
- 本代码是用于Xilinx FPGA 开发板 开发实验的 vga256 verilog源代码 -This code is used for Xilinx FPGA development board developed experimental vga256 verilog source code
zhuangtai
- 本程序实现了报文功能，在通信传输中经常会用到，使用芯片为xilinx，verilog语言编写-This program implements packets, in the communication transmission is often used, the use of chip xilinx, verilog language
shuma
- 本程序使用xilinx芯片，verilog编写，实现数码管功能，数码管为共阳极数码管，您可变换UFC管脚定义适应自己的开发板-This program uses xilinx chip, verilog written realize digital functions, digital control for the common anode digital tube, you can transform the UFC pin definitions to adapt their own d
fifo
- 本程序实现简单的fifo传输，并没有加其他的功能，试用芯片xilinx，verilog语言编写-The program implements a simple fifo transmission, and no other added features, try chip xilinx, verilog language
liushui
- 本程序实现流水线功能，您可根据自己需要更改参数，试用芯片xilinx，用verilog语言编写-This program implements the pipeline, you may be required to change the parameters according to their own try xilinx chip with verilog language