搜索资源列表
vhdl
- vhdl的一些源代码，包括dds 设计，交通灯设计，信号发生器设计的一些源代码
signal.rar
- 用VHDL语言写的信号发生器,很不错的应用,VHDL language used to write the signal generator, a very good application
DDS.rar
- DDS信号发生器，利用VHDL实现，可根据频率控制字的改变输出不同频率的信号，最高可到达10MBPS,DDS signal generator, the use of VHDL realization of frequency control word in accordance with changes in output signals of different frequencies, the maximum arrival 10MBPS
VHDL.rar
- 正弦信号发生器具有频率调节功能。采用VHDL编程实现。,Sinusoidal signal generator with a frequency adjustment function. Using VHDL programming.
cordic.rar
- 基于cordic算法的正余弦信号发生器，通过编译仿真,Cordic algorithm is based on the cosine signal generator, through the compiled simulation
DAC.rar
- 信号发生器 控制DAC输出最高100M方波、三角波、正弦波,function generator
ddfs.rar
- 基本FPGA的DDS信号发生器，可产生1-1MHZ任意频率的三角波，方波，锯齿波，正弦波,Basic FPGA-DDS signal generator, can produce 1-1MHZ arbitrary frequency triangle wave, square wave, sawtooth, sine wave
sine-generator
- 原创：采用VHDL语言编写的正弦信号发生器。rom采用quartus自带的lpm生成，可产生正弦波。更改rom内容可改变波形-Original: Using VHDL languages sinusoidal signal generator. rom using Quartus LPM s own generation, can produce sine wave. Rom content changes can change the waveform
FINALWORK
- 简易信号发生器 可产生正弦波、方波、三角波、锯齿波 周期可调 verilog-Simple signal generator can produce sine, square, triangle wave, sawtooth-cycle adjustable verilog
sin125
- 用FPGA实现DDS的信号发生器（正弦波125kHz）-Using FPGA to achieve DDS signal generator (sine wave 125kHz)
jiyuVHDLyuyandehanshuxinghaofashengqi
- 好用的函数信号发生器，能产生多种波形，例如，正弦波，方波，锯齿波，阶梯波。-Useful function signal generator, can produce a variety of waveforms, for example, sine wave, square wave, sawtooth, wave ladder.
signal_generator
- 基于vhdl的多功能函数信号发生器的设计，能实现三角波、方波、正弦波。-VHDL-based multi-function signal generator design, can achieve the triangular wave, square wave, sine wave.
vhdldds0000
- 采用fpga的hdl语言实现dds的信号发生器的设计，性能与传统相比明显提高。-Hdl language using FPGA implementation of the signal generator dds design, performance markedly improved compared with the traditional.
signal
- verilog写的串口控制信号发生器，能通过用串口控制产生正弦波方波等信号-written in verilog serial control signal generator, can be generated using serial control, such as sine wave square wave signals
DDS
- dds 正弦信号发生器步进100HZ 最高频率可达900kHZ 最低频率可大2.3Khz-dds signal generator sin walingbeam 100HZ
key2
- FPGA单片机 vhdl编程 正弦波信号发生器 加2个按键控制频率加减-FPGA Microcontroller vhdl programming sine wave signal generator plus two buttons control the frequency of addition and subtraction
DDS
- 采用DDS实现数字信号发生器, 时钟频率为100MHz,可输出1K到10M的正弦波-use Direct Digital Synthesizer realize SINA wave
zhenxianxinhao
- 此文件是正弦信号发生器实验的源码，这是老师的资料，对课堂很有帮助-This file is the sine signal generator with source code, it is the teacher of information helpful to the classroom
SG_FPGA
- 2006年电子设计竞赛二等奖，多功能函数、信号发生器核心器件FPGA内部的原理图，主要模块用VHDL代码描述，包括PLL、相位累加器、波形算法和正弦波查找表，可实现0.005Hz~20MHz的多波形信号产生，频率步进值0.005，输出接100MSPS速率的DAC--AD9762-Electronic Design Competition 2006, second prize, multi-function signal generator within the core of the devic
dds信号发生器
- dds正弦信号发生器源代码，适合处于学VHDL学生查阅