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Parall_transfer_seior
- 此两文件是在MAXplusII环境下开发并运行通过的VHDL文件，实现了并串口转换功能。-this document is in two MAXplusII environment through the development and operation of the VHDL documents, and the realization of serial conversion function.
uart(Verilog)
- uart异步串口通信协议的源代码，用vhdl语言编写，并且有完整得测试文件
RS232uart(VHDL)
- 256字节深度的RS232串口程序,共分4个模块,顶层文件\\FIFO程序\\串口收和串口发.经过测试已用于产品.可靠!
I2C
- I2C 串口通讯Xilinx项目源码 拷贝到硬盘，用ISE打开工程文件即可。
UART
- verilog代码，串口发送接收代码，含有源代码和测试文件，准确可用-verilog code for serial port transmit and receive code, with source code and test files, and accurate available
UART_VHDL_Verilog_Lattice
- 本压缩包中含有串口程序的VHDL,Verilog，Lattice三种版本的代码，均已实现。在压缩包中，含有非常详细的串口的实现规格。各种版本的代码中，含有完成的源文件，测试文件，模拟文件。-This compressed package contains serial process VHDL, Verilog, Lattice three versions of the code, have been achieved. In the compressed package, contains
uart_0910
- uart串口传输的verilog RTL级源码，已通过仿真验证。文件主要包含发送、接受位处理，发送、接受字节帧处理，对学习串口通信的朋友很有帮助-uart serial transmission verilog RTL-level source code has been verified by simulation. File mainly contains the send, receive digital processing, sending, receiving bytes of fr
uart
- 程序说明: 本次实验控制开发板上面的串口，与PC机进行通信，并在串口精灵里面显示字符。 目录说明: 工程在\project文件夹里面 源文件和管脚分配在\rtl文件夹里面 下载文件在\download文件夹里面,.mcs为PROM模式下载文件,.bit为JTAG调试下载文件。-Procedure Note: The experimental control development board above the serial port to communicate wit
fpga_mcu_communication
- 本压缩文件是51单片机与Altera_Cyclone fpga串口通信程序，经过硬件实际测试验证可用。-This compressed file is 51 and Altera_Cyclone fpga serial communication program, available through the actual test hardware.
chuankou
- 应用最广泛的串口异步通信的FPGA设计，包含整个工程文件-The most widely used FPGA design serial asynchronous communication
Serial
- 串口的设计思路和需要注意的问题 包括.v 文件-include serial.v file
UARTVHDL
- 异步串口程序的IP核，分层文件编写，包括顶层文件和底层封装文件，VHDL编写-IP core asynchronous serial procedures, hierarchical document preparation, including the top and bottom package file documents, VHDL preparation
chuankoushoufa
- 串口收发数码管显示，含vhdl，顶层文件，工程文件，经过开发板测试-Serial transceiver digital display, with vhdl, top-level files, project files, through the development board test
Spartan-3EPDemo--RS232P
- 基于spartan3e开发板的rs232串口edk程序，包含bit文件，可直接下载到板子上运行-failed to translate
UART
- 自己写的RS232串口程序，波特率可调，调整在CLKUNIT文件中-RS232 serial port to write their own programs, the baud rate is adjustable, you can adjust it in the file of CLKUNIT
new_bord_TX_10bitX2_2_5G
- Xilinx VirtexII-pro 的开发板工程文件，它是在ISE开发环境中实现的。连接有RAM、串口、LED灯、Camera-link接口等，实现的从工业相机到光缆的转换。-xilinx virtex2-pro project,camera-link
myprogram
- 文件包中包含了与FPGA及串口通信相关的程序及教程，对学习FPGA很有帮助。-File packages that contain and FPGA and serial interface communication related procedures and tutorial to the study of FPGA to have the help very much.
UART
- verilog写的串口程序，其功能完全最正确，带工程文件-verilog to write the serial program, its function is completely the right, with the project file
uart_rx_tx
- 基于sp605开发板的一个串口收发程序。包含了所有ise产生的完整的文件（ucf等），通过串口调试助手测试通过。共有四个模块构成。-Program based on the the sp605 development board serial transceiver. Contains all ise complete file (ucf etc.), by serial debugging aides tests. A total of four modules.
uart
- 此上传文件实现的功能就是FPGA里实现从PC接收数据，然后把接收到的数据发回去。 使用的是串口UART协议进行收发数据。(The function of this upload file is to receive data from PC in FPGA and send back the received data.The serial port UART protocol is used to receive and receive data.)