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T_uart
- CPLD发送模块的实现代码,设计按键检测模块，并将键值通过构造的UART发送模块发送到串口调试工具中查看。--发送格式：1位起始位+8位数据位+1位停止位=10位-CPLD implementation of the code to send the module to design key detection module, and key by constructing the UART to send the module to send to the serial port debugg
SOPC_UART
- altera公司的ep1c240c8n，串口调试程序vhdl\nios ii8.0代码等-altera company ep1c240c8n, serial debugger vhdl \ nios ii8.0 code. .
FPGA_RS_232
- 这个源码是经过对RS232长时间的研究得到的扩展性代码，主要的功能是计算机发给FPGA数据，FPGA利用这些数据去驱动数码管显示，然后再把数据通过串口传给计算机，通过串口调试软件看到你发给FPGA的数据，建议大家先看明白RS232串口通信协议之后再动手编模块。-FPGA_RS_232
sim_uart
- uart 收发器 verilog 代码，实现自收发功能 sys clk = 25m, baud 9600 停止位1， 无校验位； 代码实现了串口自收发功能，及把从 PC 收到的内容都发送会 PC, 其他波特率，自行修改代码即可，在 alter 的FPGA 上调试通过； -verilog code uart transceiver to achieve self-transceiver function sys clk = 25m, baud 9600 1 stop bit, no par
rs232c
- 基于EP1C6Q240的串口rs232通信程序代码设计，简单易懂，调试通过，基于quartus6.0-Serial rs232 communication based EP1C6Q240 code design, easy to understand, debug through, based on quartus6.0
uart
- 该段代码给基于黑金开发板DB2C5的串口调试代码。由于黑金视频都是基于DB2C8开发板开发的，本人讲代码移植到DB2C5并修改，实验后完全正确。-This code to based the the black gold development board DB2C5 serial debugging code. Black gold videos are based on DB2C8 development board developed, I speak the code to DB2C5
UART
- 本代码用verilog语言配合sopc和nios实现了串口调试的目的。软件编程用C语言描述，只是比较简单的例子，适合初学者做了解用，本人亲自在EP2C8Q上实践。-The code to use verilog language sopc and nios achieved with serial debugging purposes. Software programming using C language descr iption, but relatively simple exampl
UART16450Transceiver-SourceCode.ZIP
- 串口16450的逻辑代码，内部带仿真测试代码，已经调试通过-Serial logic code 16450, with internal simulation test code has been debugging through
RS232code
- 串口通信VHDL代码，经过调试运行正常，采用ISE13.4编写-Serial communications VHDL code, after debugging and running properly, using ISE13.4 write
uart_tx_rx
- 在altera的FPGA平台上实现rs232串口的自收发通信，速率为115200波特率，PC机使用串口调试助手即可观察结果。包含全部代码与工程，本人亲自测试通过。-Realization of self transmitting and receiving communication serial port of RS232 In altera on the FPGA platform, at a rate of 115200 baud rate, PC using serial debuggi
UART
- Verilog HDL编写的串口程序实例，很详细好用的参考代码。针对Xilinx FPGA开发板，在Xilinx ISE编译调试成功，串口开发的经典例程。-Verilog HDL serial program written examples, very good reference code in detail. In view of the Xilinx FPGA development board, in Xilinx ISE compiler debugging success, a s
serial_r
- 串口通信的接收代码，适合工程应用，也适合入门学习，个人调试无问题-Receive Code serial communication, for engineering applications, but also for learning portal, individual debug no problem
ex8_232
- 这是一个用于自收自发的uart通讯代码，包括波特率设置模块、uart收发模块，上位机使用串口调试助手(Uart module is used to communite with PC in the way of spontaneous collection, including buad setting and transceiver. Upper computer is serial debugging assistant.)
FPGA_UART
- 代码已通过实验测试，实现串口助手在线调试(The serial debug of the serial port of UART is realized through FPGA. The result is very successful after testing.)