搜索资源列表
fpga
- 用Verilog语言实现USB2.0的串口通信-Verilog
Mars-EP1C6-F_code2
- 此包为FPGA学习板接口实验程序源代码,共包括13个实验程序,有7段数码管,1602液晶显示,12864液晶显示,I2C总线,串口通信,拨码开关等.-The packet interface to FPGA board experimental procedure to study the source code, a total of 13 experimental procedure, there are 7-segment digital tube, 1602 LCD 12864 LCD,
DM2_KX8051_FTEST_RS232_C5T
- 这是一个FPGA的简单例程，主要是基于FPGA的232串口通信的例程-This is a simple routine FPGA is mainly based on FPGA-232 serial communication routines
uart_nbit
- 用verilog语言写的串口通信程序,包括收发两个模块,可用于FPGA的通信中,可通过程序设置收发的位数,有很好的扩展性.-Verilog language used to write serial communication program, including the sending and receiving two modules can be used for FPGA communications, you can send and receive through the progr
chuankou
- 基于VHDL串口通信，包括原理图和VHDL输入-VHDL-based serial communication, including schematic and VHDL input
80C51_1
- 1.异步通信软件模拟2.基于RS-232的串口通信3.基于RS-485的多机通信4. I2C总线协议的软件实现5. SPI总线在单片机系统中的实现6.-wire-1. Asynchronous communication software simulation 2. Based on the RS-232 serial communication 3. Based on the RS-485 Multi-machine communication 4. I2C bus protocol soft
RS232
- RS232_串口通信的发送端verilog源程序代码-RS232_ serial communication sender verilog source code
FPGAPS2keyboard
- FPGA嵌入式开发的源代码，本实例是实现psp键盘的串口通信-the source file based on FPGA it implement the function of comunation
eda
- 利用FPGA可编程芯片及Verilog HDL语言实现了对直流电机PwM控制器的设计，对直流电机速度进行控制。介绍了用Verilog HDL语言编程实现直流电机PwM控制器的PwM产生模块、串口通信模块、转向调节模块等功能，该系统无须外接D／A转换器及模拟比较器，结构简单，控制精度高，有广泛的应用前景。同时，控制系统中引入上位机控制功能，可方便对电机进行远程控制。-Using FPGA programmable chip and Verilog HDL language for the desi
sci
- VHDL编写的仿单片机串口通信程序，具有校验等功能-Written in VHDL simulation microcontroller serial communication program with checking functions
fpga_mcu_communication
- 本压缩文件是51单片机与Altera_Cyclone fpga串口通信程序，经过硬件实际测试验证可用。-This compressed file is 51 and Altera_Cyclone fpga serial communication program, available through the actual test hardware.
UART
- 本模块的功能是验证实现和PC机进行基本的串口通信的功能。
rs232
- 用vhdl实现fpga串口通信 包含 波特率生成 发送模块 接收模块 过采样 signaltap使用-Vhdl fpga serial communication with the realization of sending module contains the baud rate generation receiver module using oversampling signaltap
serial-VHDL-Deign
- 本程序模块的功能是验证实现和PC机进行基本的串口通信的功能。需要在PC机上安装一个串口调试工具来验证程序的功能。-This procedure is to verify the function module and the PC machine to achieve a basic serial communication functions. Need to install a serial PC, debugging tools to verify functionality of the
uart
- 串口通信程序，硬件描述语言VHDL，代码简洁，功能完善-Serial communication program, hardware descr iption language VHDL, the code simple and functional. . .
rs232
- 本设计是PC和FPGA的串口通信的程序，用的是VERILOG语言，调试成功，用户可根据自己的项目稍作改动。-The design is a PC and the FPGA' s serial communication procedures, using a VERILOG language, debugged, the user can make a little change according to their own projects.
uart
- FPGA模拟串口 实现串口通信，波特率外加-FPAG uart chuankou
CPLD
- FPGA与CPLD之间通过串口通信的程序，波特率为9600。-FPGA and CPLD via the serial port communication program, the baud rate to 9600.
FPGASERIALPORT
- 利用VHDL语言实现串口通信，本程序经过调试可以正常使用。-VHDL SERIAL PORT COMMUNICATION
vb1
- VB编写的仿真实电子琴操作界面，包含与FPGA串口通信的功能-VB, real keyboard simulation interface, contains the FPGA serial communication function