(2,1,3)卷积码编码，硬判决译码；编码是matlab语言，译码是verilog语言-(2,1,3) convolutional code encoding, hard decision decoding coding is matlab language, decoding is verilog language

(2,1,3)卷积码编码，软判决译码；matlab语言编码；verilog语言译码；-(2,1,3) convolutional code encoding, soft-decision decoding matlab coding verilog decoder

本设计是一个基于FPGA的咬尾卷积码编码器设计，要求使用verilog语言编写编码器模块，通过编译和综合，并通过matlab和modelsim仿真对比验证设计结果。-The design is an FPGA-based tail-biting convolutional code encoder design requires the use verilog language encoder module, through compilation and synthesis, and by c

关于MATLAB语言的卷积码的编码与维特比译码-About convolution coding MATLAB language code and Viterbi decoding