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JIJIAQI
- Quartus II工程压缩文件，是一个典型的基于FPGA的计价器工程项目，有有限状态机、50MHz分频、计数、译码、动态扫描等模块。-Quartus II project files, is a typical FPGA-based project of the meter, there are finite state machine, 50MHz frequency, counting, decoding, dynamic scanning module.
qiangdaqi
- Quartus II工程压缩文件，是一个典型的基于FPGA的抢答器工程项目，有计数、BCD译码、动态扫描等模块。-Quartus II project files, is a typical browser-based FPGA Answer Project, a count, BCD decoding, dynamic scanning module.
TrafficLight
- 用vhdl写的交通灯程序，压缩包内有整个工程文件-With the traffic lights to write vhdl procedure, compressed package files have the whole project
74HC161
- 74ls161 基于verilog语言的实现 源程序在压缩包的hdl文件夹中-74ls161 language based on the realization of verilog source package in compressed folder hdl
74HC283
- 74ls283 基于verilog语言的实现 源程序在压缩包的hdl文件夹中-74ls161 language based on the realization of verilog source package in compressed folder hdl
LCD1
- 用Verilog HDL编写的16*2液晶显示one world,one dream。压缩包中包括所有文件，使用的芯片为EP2C5T144，经过最后下载测试的。-Verilog HDL prepared with 16* 2 LCD display one world, one dream. Compression package, including all documents, use the chips for EP2C5T144, download final test.
HMM
- 有关HMM的MATLAB代码 都在压缩文件了-CODE FOR HMM DOWNLOAD WHEN YOU NEED
vhdl
- 6个学习VHDL语言进行FPGA设计的课件资料，内容详实，例子丰富，适合初学者。（压缩包中含6个文件！）-6 to learn VHDL, FPGA design courseware information, informative, example-rich, suitable for beginners.
fpga_mcu_communication
- 本压缩文件是51单片机与Altera_Cyclone fpga串口通信程序，经过硬件实际测试验证可用。-This compressed file is 51 and Altera_Cyclone fpga serial communication program, available through the actual test hardware.
dianzizhong
- 该代码是用VHDL编写的电子时钟，可以实现调时调分，7段码显示，在Xilinx的Spartan3E上下载测试过，压缩文件中包含了整个工程，并有管脚分配文件，非常适合VHDL的初学者，比如一些基本的按键，去抖，闪烁写法。-The VHDL code is written using the electronic clock adjustment can be achieved when the transfer points, 7 code shown to download the Xilinx
WaveGenerate
- 压缩包里面好友一个word文件，文件介绍了用VHDL语言设计波形发生器-pacage have a word file,introduce the methed to generate wave
H.264decodeVerilog
- 基于FPGA的EDA设计技术，用Verilog硬件设计语言解压缩H.264格式的视频压缩文件。-FPGA-based EDA design, using Verilog hardware design language decompress H.264 video compression format file.
tft
- 好东西，重要的是分享，此压缩包文件是关于怎样使用tft液晶屏的，还有是关于fpga与dsp通信的实现，大家好好讨论讨论，相互提高-Good thing, it is important to share, if there are any questions, or what the key issues, we have a good discussion to discuss with each other to improve
anna-y0802
- 压缩文件内含有VHDL和VERILOG编写的SDRM控制源码，已通过编译，均可直接使用。-Zip file contains VHDL and VERILOG source code written in SDRM control, has passed the compilation, can be used directly.
String-and-conversionVERILOG
- 该压缩文件包含一个verilogHDL实现数据的串并连转换功能。-Use verilog realize string and even the conversion function
ep2c5_test
- 该压缩文件是基于FPGA的SOPC系统基本测试程序-The zip file is the basic FPGA-based SOPC system test procedures
ep2
- 我在国外学习，使用CUPL编GAL，国内用的ABEL比较多，这方面资料比较少。压缩文件包含源码和仿真文件，仿真结果文件，可用wincupl或者PROTEL打开-CUPL EXAMPLE OF BUILDING A BASIC FSM IN GAL16V8
verilog4
- 用verilog语言编写的数码管显示实验程序。通过分频计数来使数码管以640ms间隔从1变化到F。压缩包内也包含此数码管显示实验程序的modelsim仿真文件。-Verilog language with digital display test program. By dividing the clock count to make the digital control to 640ms intervals from 1 to F. This package also contains a
verilog5
- 用verilog语言编写的4位乘法器程序。通过循环移位进行4位二进制数的乘法运算。压缩包内也包含此4位乘法器程序的modelsim仿真文件。-Verilog language with 4-bit multiplier process. By cyclic shift for 4-bit binary number multiplication. This compressed package also contains four multipliers modelsim simulation
verilog6
- 用verilog语言编写的VGA显示程序。通过本程序可以学习到VGA显示原理，及如何用verilog语言编写vga显示程序。压缩包内也包含此VGA显示程序的modelsim仿真文件。-Verilog language with the VGA display program. Through this program can learn to VGA Display principles, and how to use the verilog language vga display progr