搜索资源列表
sARM7TM
- ARM7TM core源码，此码来自于opencore组织，此组织免费提供一些IP core，都是一些老外写的。-ARM7TM core source, the code from opencore organizations, this organization provided free IP core, are written by foreigners.
open_cores_VGAcore
- 老外写的基于wishbone总线协议的VGA核控制器,Verilog版本适合于初学者学习VGA核控制器的原理以及总线协议的把握-Written by foreigners wishbone bus protocol based on the nuclear VGA controller, Verilog version is suitable for beginners to learn the principles of the controller and the VGA core gras
Statemachinedesigntechniques
- 老外写的编写有限状态机的书，书中提供的各种技巧，方法对大家肯定很有帮助-The preparation of a foreigner to write finite state machine of the book, the book provides a variety of techniques, methods to be helpful, I am sure you
CPUVHDL
- CPU+VHDL代码及详细注释\一个老外写的 200多行代码-CPU+ VHDL code and detailed notes \ a foreigner wrote more than 200 lines of code
LAOWAI
- 一个老外写的HDLC协议，包括说明文件，很有参考价值-Written by a foreigner HDLC protocols, including documentation, of great reference value
mem_ctrl
- 老外写的通用的存储器控制核，支持SDRAM SSRAM FLASH,ROM等等 8个片选信号 支持RMW cycles最大可达9*64M Bytes的存储器容量-Written by foreigners universal memory controller core, support for SDRAM SSRAM FLASH, ROM, etc. 8 chip select signals support RMW cycles up to 9* 64M Bytes of memory ca
cordic
- cordic算法实现的核心代码，老外写的。我已经验证过了，是完全可以使用的！请大家放心下载。-cordic algorithm of the core code, written by foreigners. I have verified, is not fully used! Please rest assured to download.
The-Verilog-Hardware-Description
- 老外写的一本硬件描述语言的书，相当的好！-The Verilog book << Hardware Descr iption Language>>
A-Verilog-HDL-Primer
- 老外写的经典verilog书籍二 the A Verilog HDL Primer -Classic books written by foreigners verilog two the A Verilog HDL Primer
tt_my_first_fpga
- 老外写的英文版的我的第一次FPGA之旅，英文好的童鞋可以借鉴下-Foreigners write the English version of my first the FPGA trip, good English children' s shoes can learn the
usbblaster
- 老外原版的 altera usb 下载线 vhdl源码 -the altera usb download cable vhdl source
rtl
- 通过verilog实现pc串口和fpga的双向通信。代码是老外写的，非常严谨-the verilog code comnunicate with the pc by serial port
Asynchronous FIFO Architectures
- 老外的经典异步FIFO结构讲解，一共三个部分。(Asynchronous FIFO Architectures Vijay A. Nebhrajani)