搜索资源列表
ad5791
- 在Quartus环境下编写,使用Cyclong系列芯片,配置七通道高精度AD5791,该例子为AD5791的FPGA配置使能代码,包括模拟数据输入模块,复位模块,命令接收是能配置模块。-AD5781,Digital signal convert to Analog signal
ICAP_FPGA_Multiboot
- 在xilinx的ml507板子上用的ICAP功能 配置存储器 这里边包含了控制程序 以及配置ICAP寄存器的程序 就是完整的通过串口控制FPGA多重配置的程序 用verilog实现的-how to configure the ICAP
1210
- ad芯片的配置程序,-AD chip configuration program, Oh Oh Oh Oh Oh Oh
Xilinx-ise-9.x-fpga-cpld
- 《Xilinx ISE 9.X FPGA/CPLD设计指南》以FPGA/CPLD设计流程为主线,详细阐述了ISE集成开发环境的使用,并提供了多个示例进行说明。书中在介绍FPGA/CPLD概念和设计流程的基础上,依次论述了工程管理与设计输入、仿真、综合、约束、实现与布局布线、配置调试等在ISE集成环境中的实现方法和技巧。《Xilinx ISE 9.X FPGA/CPLD设计指南》结合作者多年工作经验,立足于工程实践,选用大量典型实例,并配有一定数量的练习题。随书配套光盘收录了所有实例的完整工程目录
cof_M4K_test2
- 基于M4K块的移位寄存器配置仿真,来源于特权同学-M4K blocks based on the shift register configuration simulation, students from privileged
ad9889b_ctrl
- AD9889B配置程序 支持CSC 支持EDID解析 支持热插拔-AD9889B configuration program supports hot-swappable CSC supports EDID resolution
sdirx
- GV7601 GSPI驱动程序 配置GV7601 支持loopback环路输出 -GV7601 GV7601 GSPI driver configuration supports loopback loop output
iic_88091
- 实现88091驱动 带iic驱动 可以通过网管控制盘 通过IIC更新配置参数-Achieve 88,091 iic driver can drive belt through the network control panel update configuration parameters through the IIC
BlazeNoC_QoS-master
- BlazeNoC_QoS:支持QoS的可重配置片上网络路由,有很高的性能。此代码包括完整的Xilinx ISE的工程,可以很方便地修改和移植。-BlazeNoC_QoS: QoS-reconfigurable chip network routing, a high performance. This code includes a complete Xilinx ISE project, can be easily modified and transplantation.
VGA_interface
- 采用FPGA控制VGA的借口,采用Verilog编写,Quartus II编译,恰当配置后开发板可以与显示器相连显示图像-Using FPGA to control VGA excuse, Verilog prepared, Quartus II compilation, the proper development board can be configured to display an image attached to the monitor
V-6-FPGA-Configure-Guide
- Xilinx公司的Virtex-6配置指南,是详细的官方指南-Virtex-6 configuration guide Xilinx company, is the official guide
spi
- 该程序是一个可完成订制化的SPI双向总线接口,时钟相位、极性,以及分频比全部可通过寄存器进行配置,已经在ISE下通过综合,占用资源少,强烈推荐 -The program is a complete custom of SPI bidirectional bus interface, clock phase, polarity, and the divider ratio can all be configured through the register, has been in the I
EP1C3T144_develop
- EP1C3T144最小系统板原理图,包括完整的电源电路、下载配置电路、基本测试电路。-EP1C3T144 minimum system board schematic diagram, including the power supply circuit, complete download configuration circuit, basic circuit.
plx_r
- vhdl中的频率锁相环部分,完成时钟配置-part of the frequency locked loop vhdl complete clock configuration
HelloZynq
- 基于ZYNQ-7000开发板的helloword project,已经配置开发板信息,可运行在14.4ISE环境下。-Based on zynq-7000 helloworld project with essential configuration information,run in ISE14.4
AD9648_ver
- FPGA通过SPI总线配置AD采集芯片AD9648的程序,Verilog实现 -FPGA configuration via SPI bus chip AD9648 AD acquisition procedures, Verilog realization
lut
- 可参数化配置的CAM模块,仿照xilinx IP core设计而成,使用SRL16E基本单元实现,节省空间-Can be parameterized configurable CAM module, modeled xilinx IP core designed, implemented using the basic unit SRL16E, space-saving
interpolation_shaping_filter
- 内插成型滤波器的FPGA实现,可根据需要配置不同的内插倍数,Quarter II环境编译,可直接使用-Interpolation shaping filter FPGA, can be equipped with different interpolation factor, Quarter II compiler environment, can be used directly
i2c_7113
- 利用I2C配置SAF7113的代码,利用vhdl语言编写。-Config the SAF7113 via I2C,write in VHDL.
i2c_4163okok
- 利用Altera的Qsys生成片上系统SOC,利用CPU进行I2C的配置电路。-Use of Altera s Qsys generation system on chip SOC, the use of the CPU I2C configuration circuitry.