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SS7160.ZIP
- 该代码为配合7号信令模块MK50H27的cpld(xilinx 95144)的逻辑代码,其中包括了VHDL及原理图.-the code to meet on the 7th of signaling modules MK50H27 cpld (Xilinx 95144 ) logic code, which included a schematic and VHDL.
Farsight-FPGA02
- 1. Source too simple 2. Not the source 3. The lack of documentation 4. Selected category and not the development environment 5. Scrawl -1. Source too simple 2. Not the source 3. The lack of documentation 4. Selected category and not the development e
I2C_control
- Xilinx提供的I2C控制器代码,Master/Slave全功能- Readme File for I2C Customer Pack Created: 7/8/99 ALS Revised: 11/4/99 ALS ******************************************************************************************************************************
Chapter-7
- 练习七在verilog hdl中使用任务（task）319 -• Source code of designs in chapters 1 to 8. • Chapter 8 designs include the SAYEH processor, its C Compiler, and its Sort program run files. • Several Designs, including SAYEH, that are program
Embedded-Systems_VHDL
- Digital Design An Embedded Systems Approach Using VHDL Peter J Ashenden The source code for the examples is available in the following ZIP archives, one per chapter. There is also an archive containing source code for the Gumnut core, descri
098111__1367421625730
- DE2_System_v1.4a.zip 71.2M 2007- 02 22:51 For DE2 boards with Serial Number (S/N) starting with Digit 0 and QuartusII version 6.0 DE2_System_v1.4b.zip 79.4M 2007-07-11 22:42 For DE2 boards with Serial Number (S/N) starting with Digit 0