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能综合的YCrCb2RGB模块（verilog)_采用3级流水线
- 能综合的YCrCb2RGB模块（verilog)_采用3级流水线,用fpga做小数运算，还有就是流水线技术 -can YCrCb2RGB integrated module (Verilog) _ used three lines, they simply do with fractional arithmetic, there is pipelining technology
CORDIC
- 用verilog写的CORDIC算法实现，很适合做超越函数的运算。通常用于实现正弦乘法，或者坐标变换。-The cordic arithmetic implemented by verilog is adapted to exceed function.It is usually used to implement sine multiplication or coordinate tuansform.
4bit数据的加减乘除
- 一个很不错的例子,实现的是4bit的加减乘除,用modelsim做的仿真.-a very good example of the realization of the Band is the arithmetic, modelsim do with the simulation.
vhdl程序例子
- vhdl程序源代码，包括Combinational Logic Counters Shift Registers Memory State Machines Registers Systems ADC and DAC Arithmetic等-VHDL source code, including Combinational Logic Counters Shift Registers State Machines Registers Memory S
4bits_alu
- 实现4位加减乘除的alu，采用超前进位加法和布斯乘法，代码较为简单。-achieve four of the ALU arithmetic using CLA Bush and multiplication, code more simple.
VHDL数学运算库1.0
- 这是一个VHDL写的数学运算的硬件设计库，还算比较完整-This is a VHDL write arithmetic hardware design basement, still relatively complete
Quaalu
- ALU算术逻辑单元的简单实现,利用VHDL语言编写,可进行加法,减法,以及位的左右移动,只需一个时钟脉冲-ALU arithmetic logic unit to achieve a simple, using VHDL language, can be additive, subtractive, and the place and move around only one clock pulse
VHDL的基本数学运算库
- VHDL的基本数学运算库,非常好用-VHDL basic arithmetic library, a very handy! !
DaFilter
- /* This program generates the DApkg.vhd file that is used to define * the DA filter core and gives its parameters and the contents of the * Distributed Arithmetic Look-up-table \"DALUT\" according to the DA algorithm-/ * This program generate
6tapFIR.rar
- 6阶FIR+verliog+分布式算法（DA）,6 bands FIR+ Verliog+ Distributed Arithmetic (DA)
Signed-Arithmetic-in-Verilog-2001
- 有符号数的完整讲义和例子Verilog 2001-Signed Arithmetic in Verilog 2001, paper with examples
ALU
- 算数逻辑单元，实现算数加、减，加1、减1运算和逻辑与、或、非和传递-Arithmetic logic unit, to achieve arithmetic add, subtract, plus one, minus one operation and logical AND, OR, and transmission of non-
ALU8
- ALU算术逻辑单元，8位，含源程序以及仿真后的波形图-ALU arithmetic logic unit 8, including source code, as well as post-simulation waveform
arithmetic
- 在Verilog环境下实现简单的数学逻辑运算从而更好的了解 VHDL的编程风格-arithmetic
Char5-basic-arithmetic-logic-models
- 夏宇闻著作：从算法设计到硬线逻辑的实现,CHAR5：基本运算逻辑和它们的Verilog_HDL模型-XIA Wen works: from algorithm design to hard wire logic implementation, CHAR5: basic arithmetic logic models and their Verilog_HDL
Digital-Computer-Arithmetic-Datapath-Design-Using
- Digital Computer Arithmetic Datapath Design Using Verilog HDL
arithmetic-logic-unit
- 该文档很好的讲述了运算逻辑单元和他们的verilog模型的设计-The document describes a good arithmetic logic unit and their model design verilog
Handbook-of-Floating-Point-Arithmetic---Birkhause
- Floating-point arithmetic (2008), ADD, SUB, MUL, SQRT, FUNCTION (IEEE 754-1985 Standard, IEEE 854-1987 Standard, New IEEE 754-2008 Standard)-Floating-point arithmetic (2008), ADD, SUB, MUL, SQRT, FUNCTION (IEEE 754-1985 Standard, IEEE 854-1987 Stand
From-Arithmetic-to-Hardware-Logic
- 夏宇闻著作：从算法设计到硬线逻辑的实现.DOC Verilog HDL的基本算法及实现-From Arithmetic to Hardware Logic. Verilog HDL
ARITHMETIC
- 算术乘法器，这是我自己设计的算术乘法器，是用VHDL语言设计的，希望对大家有帮助-Arithmetic multiplier, this is my own design arithmetic multiplier, is designed with VHDL language, and they hope to help everyone