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tongxin
- 串口与电脑的通信 可以用调试助手 进行试验 采用verilog语言设计 编译已通过-Serial communication with the computer test can be used with debugging assistant compiled verilog language design has passed
uart
- 利用串口调试助手是实现pc机和fpga的串口通信功能，程序附注释。-Debug Assistant is achieved using serial pc machine and fpga serial communication function, the program annotated.
my_uart_top
- 实现的功能如题，就是FPGA里实现从PC接收数据，然后把接收到的数据发回去。使用的是串口UART协议进行收发数据。上位机用的是老得掉牙的串口调试助手-To achieve the functions such as title, that is, to achieve FPGA receives data from the PC, and then receive data back fat. Using a UART serial port protocol to send and recei
uart_tx_rx
- 该工程用verilog编写，已通过串口调试助手调试通过，接收模块采用8倍波特率采样数据，有较好的滤波功能，在PC上完成自发自收功能。-Verilog prepared by the project, has passed through the serial debug debugging assistant, receiving 8 times the baud rate module sampling data, a better filtering in the PC to complet
IS61WV51216BLL
- 备注：使用的是VeriLog HDL语言 软件环境xilinx ISE 10.1，硬件：高教仪EXCD-1FPGA电路板。FPGA信号：spartan-3e . 功能编写硬件描述性语言实现FPGA对板上外设SRAM IS61WV51216BLL的读写，通过串口发送到上位机上，使用串口助手显示读取的数据。-Note: Use the VeriLog HDL language software environment xilinx ISE 10.1, hardware: Higher M
SerivalPC1
- 用VHDL编写的单片机与串口的通信，通过调试，波特率为9600，在串口调试助手能看到相应的结果-Prepared with the VHDL serial communication between MCU and, through the commissioning, the baud rate is 9600, the serial debugging assistant can see the results of the corresponding
ps2verilog
- 本程序实现了基于FPGA的PS2键盘控制器，主机即FPGA读取键盘的键码然后解码输出到上位机（串口调试助手）显示，用户友好，调试方便，-This program implements the PS2 keyboard controller based on FPGA, the FPGA reads the keyboard master key code and then decode the output to the host computer (serial debugging assis
RS_232
- VHDL实现RS232串口通信，压缩包内有完整的quartus2工程，由顶层，波特率，发送，接收四个模块构成。外部电路只需要一片MAX232就能与串口助手或单片机通信。-VHDL implementation of RS232 serial communication, compressed within a complete quartus2 project from the top, baud rate, send, receive four modules. External circui
uartrxto
- STC12LE5A32S2单片机的串口驱动函数，该驱动函数可以实现收发字符串的功能，同过串口小助手发送字符串，然后又接收回所发送的字符串。-STC12LE5A32S2 microcontroller serial port driver functions, the driver can send and receive function string function, with his assistant to send a string over the serial port, and
UART
- sep4020开发板uart模块的驱动程序，使用串口0，在串口调试助手上显示prochip-uart driver module development board sep4020, serial 0, serial debugging assistant prochip
ps2_keyboard_test
- FPGA通过ps2接收键盘数据，然后把接收到的字母A到Z键值转换相应的ASII码，通过串口发送到PC机上。需要接键盘，还要用调试助手，下载程序后，在键盘上按下一个键，比如A，则在PC调试助手上可看到A-FPGA received by ps2 keyboard data, and then received the letters A through Z keys to convert the corresponding ASII code, sent through the serial po
uartverilog
- FPGA与上位机通过串口调试助手进行串口通信，回发传过来的数据-FPGA and host computer through the serial port debugging assistant serial communication, and pass over the data postback
09_uart2
- 串口字节收发通信，可以从PC机上通过串口调试助手输入一个字节然后从串口调试助手的接收区查找你输入的字节-Serial bytes to send and receive communication from the PC through the serial port debugging assistant enter a byte and then find your input bytes from a serial debugging assistant reception area
my_uart
- 数据收发器，串口模块，可使用串口调试小助手来进行数据收发，验证模块的功能-Data transceiver, serial module, you can use the serial port to debug his assistant to send and receive data, verify the functionality of the module
verilog_uart
- verilog实现串口的调试，用串口调试助手验证通过。-verilog serial debugging and validation by serial debugging assistant.
jieshoufasong
- 实现FPGA和PC机之间的通信。PC机发送的数据可以通过FPGA显示在数码管上；FPGA通过按键发送的数据可以显示在PC机的串口调试助手上。-Communication between the FPGA and the PC. PC sends the data can be displayed through the FPGA digital tube FPGA through the button to send the data can be displayed on a PC seri
UART
- 基于FPGA的串口程序 由VHDL语言编写，通过串口助手实现数据的发送与接收-FPGA-based serial procedures by VHDL language and sending and receiving data through the serial port assistant
uart_tx
- 在SP605开发板上实现了串口的发送程序，并且通过验证。可以通过串口调试助手进行测试！-SP605 development board serial transmission program, and validation. Tested by serial debugging assistant!
uartverilog
- FPGA串口通信，已在FPGA实验板上用串口调试助手实验成功，可以硬件实现。-FPGA serial communication experiment was a success in the FPGA board serial debugging assistant, can be implemented in hardware.
VHDL_uart
- 用xilinx的FPGA-spartan3E实现uart，固定波特率9600，偶校验，系统时钟50MHz，能够实现将从串口调试助手发送到FPGA的数据重新发回串口调试助手-using xilinx s FPGA-spartan3E to implement uart with a baudrate of 9600, even parity check. The system frequency is 50MHz.It can turn the data from serial assistant