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cal
- 设计一个十进制计数器，由0到9进行循环计数，同时将计数结果通过数码管显示出来-Design of a decimal counter, from 0 to 9 for cycle counting, while counting resulted in the adoption of digital tube display
cal
- 运用quartusII vhdl语言做成的计算器-Made use of quartusII vhdl calculator language
cal
- verilog设计计算器顶层模块，无下层模块需自行添加-verilog based calculator
CAL
- 基于BCD码的十进制ALU设计，可实现加减乘除的功能-BCD to decimal ALU based design can achieve the arithmetic function
rms_cal
- 基于VHDL的有效值求取，内含低通滤波子模块-RAM CAL with LPF by VDHL
cal
- 针对CPLD实现简易计算器的程序。全部程序都在了。-cpld cal program