搜索资源列表
xapp514_aes3-audio
- DVB数字音频接口(AESEBU)encoder源码,包括VHDL和VERILOG,基于XILINX FPGA,已验证.-AES-EBU interface,VHDL,VERILOG
FPGA--DSP
- FPGA数字信号处理实现原理及方法 配套光盘的全部内容 含书中所有源码-FPGA digital signal processing to achieve the principles and methods supporting the entire contents of the CD-ROM containing all the source code of the book
Mars_EP1C6F_Comprehansive_demo(VHDL)
- FPGA开发板配套VHDL代码。芯片为Mars EP1C6F。综合实验的源码。包括交通灯实验等。-FPGA development board support VHDL code. Chips for the Mars EP1C6F. General experimental source. Experiments, including traffic lights.
10100MIP
- 以太网10100M IP核Verilog源码(可综合)\以太网10-100M IP核Verilog源码,可综合-10100M IP Ethernet core Verilog source code (which can be integrated) \ 10-100M IP Ethernet core Verilog source code can be integrated
FPGA-modules-code
- CPLD/FPGA常用模块与综合系统设计实例精讲-图书源码-Commonly CPLD/FPGA module with integrated system design examples succinctly- Book source
vga
- 基于EPM1270的VGA显示器接口源码Verilog-Based on the EPM1270
Digitalfilter
- 一篇基于FPGA的数字滤波器的小论文,附带有VHDL源码-An FPGA-based digital filter small papers, comes with VHDL source code
uartverilog
- xilinx提供的verilog_uart源码,适合做串口的人学习-Xilinx provided verilog_uart source, suitable for those who study serial
sin.tar
- 神奇的sin波生成verilog源码,非常简单的代码无需乘法即可生成sin,cos,值得搞算法的人借鉴-Magic sin wave generated Verilog source code, the code is very simple multiplication can be generated without sin, cos, worthy people from engaging in algorithm
19854799dul_ram(yk)
- 双口RAM的FPGA源码Altera 活XIinx或ATmel公司都可以-Dual-port RAM of the FPGA source
sd_card
- 在开发FPGA上比较有用,主要关于SD CARD的源码-FPGA in the development of more useful, the main source of about SD CARD
1234
- 一段NOR FLASH 控制器的Verilog源码-Verilog
Mars_EP1C6F_fundemantal_demo
- FPGA 开发板源码。芯片为Mars EP1C6F.VHDL语言。可实现一些基本的功能。如乘法器、加法器、多路选择器等。-FPGA development board source. Chips for the Mars EP1C6F.VHDL language. Can achieve some of the basic functions. Such as multiplier, adder, such as MUX.
Mars_EP1C6F_Interface_demo(VHDL)
- FPGA开发板配套VHDL代码。芯片为Mars EP1C6F。一些接口通信的源码。包括7段数码管、I2C通讯等。-FPGA development board support VHDL code. Chips for the Mars EP1C6F. Some of the source interface. Including 7 digital tube, I2C communications.
Mars_EP1C6F_Interface_demo(Verilog)
- FPGA开发板配套Verilog代码。芯片为Mars EP1C6F。一些接口通信的源码。包括7段数码管、I2C通讯等。-FPGA development board supporting Verilog code. Chips for the Mars EP1C6F. Some of the source interface. Including 7 digital tube, I2C communications.
Mars_EP1C6F_Fundermental_demo(Verilog)
- FPGA开发板配套Verilog HDL代码。芯片为Mars EP1C6F。是基础实验的源码。包括加法器、减法器、乘法器、多路选择器等。-FPGA development board supporting Verilog HDL code. Chips for the Mars EP1C6F. Are the basic source experiment. Including the adder, subtraction, and multiplier, such as MUX.
lai_PWM
- FPGA下PWM的Verilog 源码,含目标程序,可直接下载使用,可用在电机控制中-FPGA in Verilog source code under the PWM, including the target program, can be directly downloaded to use, can be used in motor control in
logicFPGA
- 电子设计大赛作品_音频信号分析仪的FPGA源码(一等奖)-Electronic Design Competition works _ audio signal source analyzer FPGA (first prize)
mmarm_EDACN
- 用FPGA实现ARM嵌入式处理器功能的Verilog源码及说明-FPGA with embedded ARM processor to achieve the functional descr iption of Verilog source code and
Ethernet
- 100base-t4中继器源码!实现8端口100BASE-T4半双工中继器。-100base-t4 Ethernet repeater