搜索资源列表
MASK.VHDL
- MASK调制VHDL程序与仿真 基于VHDL硬件描述语言，对基带信号进行MASK调制-MASK modulation VHDL simulation based on the procedures and VHDL hardware descr iption language, the baseband signal modulation MASK
mask.vhd
- mask
VHDLGW48
- ASK调制与解调VHDL程序及仿真 FSK调制与解调VHDL程序及仿真 PSK调制与解调VHDL程序及仿真 MASK调制VHDL程序及仿真已经调试好的程序
7851654
- 8.12 MASK调制VHDL程序及仿真,完增的、、用hdl完成了mask的编译和仿真
VHDLprogram
- VHDL的程序包，包括LED控制，LCD控制、DAC0832接口电路、URAT、FSK\PSK\MASK调制、波形发生器等。适合工程参考-VHDL package, including the LED control, LCD control, DAC0832 Interface Circuit, URAT, FSK \ PSK \ MASK modulation, such as waveform generator. Reference for the project
MFSK_VHDL
- --文件名：PL_MASK --功能：基于VHDL硬件描述语言，对基带信号进行MASK调制 --说明：这里MASK中的M为4 -- File Name: PL_MASK- features: VHDL hardware descr iption language based on the base-band signal modulation MASK- Descr iption: Here MASK of M 4
MASK
- MASK调制系统设计和VHDL程序及仿真-MASK modulation system design and simulation of VHDL procedures and
MASK_modulation_VHDL
- 采用MASK调制的VHDL程序以及它的仿真，是入门最有用的27个例子-MASK modulation process using VHDL and its simulation, is the entry of the 27 examples of the most useful
VHDLprogram
- 有ASK,MSK,PSK,MASK,MFSK的VHDL程序实现及仿真结果分析。-There ASK, MSK, PSK, MASK, MFSK the VHDL program implementation and simulation results.
example_VHDL
- VHDL 语言的初级实例，27个。电子钟，mask，ask-VHDL, the primary instance, 27. Electronic clock, mask, ask ... ...
8.12MASKmadebyVHDL
- 利用FPGA实现基带编码源代码，大家有兴趣可以参考啊！-MASK made by VHDL
EDGELAP
- Based on this one-dimensional analysis, the theory can be carried over to two-dimensions as long as there is an accurate approximation to calculate the derivative of a two-dimensional image. The Sobel operator performs a 2-D spatial gradient measurem
sobel_verilog
- Based on this one-dimensional analysis, the theory can be carried over to two-dimensions as long as there is an accurate approximation to calculate the derivative of a two-dimensional image. The Sobel operator performs a 2-D spatial gradient measurem
8.14-MPSK-VHDL
- MASK调制VHDL程序及仿真 一调试验证通过-MASK modulation and simulation of a VHDL program verified through debugging
Verilog-hdlFPGA
- 关于FPGA的提高篇，Verilog HDL语言写的， 包含LCD控制VHDL程序与仿真，AD/DA，MASK，FSK，PSK，正弦波发生器，等等经典程序-Articles on improving the FPGA, Verilog HDL language, and includes LCD control procedures and VHDL simulation, AD/DA, MASK, FSK, PSK, sine wave generator, and so the classi
8.13-MFSK-debug-VHDL-program
- 基于VHDL硬件描述语言，对基带信号进行MASK调制-VHDL hardware descr iption language based on the modulated baseband signal MASK
MASK-code---decode
- FPGA作为核心控制器，实现MPSK的调制与解调功能-FPGA as the core controller MPSK modulation and demodulation functions
FPGA-exmaple
- FPGA实例合集，包含步进电机定位控制系统VHDL程序与仿真，MASK调制VHDL程序及仿真-failed to translate
juanji_3_3
- 自己写的3*3的高斯卷积模板，用Verilog在ISE上写的-Write your own 3x3 Gaussian convolution mask, using Verilog write on the ISE
hierarchical-code
- Abstract—This paper presents a highly effective compactor architecture for processing test responses with a high percentage of x-values. The key component is a hierarchical configurable masking register, which allows the compactor to dynamically ad