搜索资源列表
PCI总线仲裁参考设计，Quicklogic提供
- PCI总线仲裁参考设计，Quicklogic提供的verilog代码-PCI bus arbitration reference design, pioneered the Verilog code
arbiter.rar
- 一个用verilog编写的总线仲裁程序。多个设备共享总线，不同设备的优先级是变化的，保证每个设备都有公平的使用总线的机会。,Verilog prepared a bus with arbitration proceedings. Multiple devices share the bus, the priority of different devices is changing to ensure that each device will have a fair opportunity t
PCI.rar
- 用VHDL编写的RTL8109与单片机的接口驱动程序.,Prepared using VHDL Interface with MCU RTL8109 driver.
pcirw
- quartusII环境下实现FPGA与PCI9054通信。根据PCI9054规范控制lhold、lholda、ads、blast、lbe、lwr等握手信号的时序，可完成上位机通过PCI总线读写FPGA本地地址空间的功能- Communication between FPGA and PCI9054 in QuartusII IDE.Implementation for the timing of handshake signals such as lhold, lholda, ads,bla
FPGA_8008
- pci pci转local bus总线的应用，使用IPcore alter器件-pci pci convert local bus application,use alter IP core
pci_mcst
- ---简化版，实现PCI总线控制--- 器件：ep1c6 开发工具：QuartusII 功能：简化PCI总线接口，占用资源少； 实现单路曼彻斯特码的收发。---- Starter Edition, to achieve control of PCI bus devices---: ep1c6 development tools: QuartusII functions: simplify PCI bus interface, occupy less resources the
BusMasteringPCIExpressInAnFPGA
- This paper describes a bus mastering implementation of the PCI Express protocol using a Xilinx FPGA. While the theoretical peak performance of PCI Express is quite high, attaining that performance is a complex endeavor on top of an already complex pr
ctrl_PWM
- 舵机控制源程序，属于单舵机控制，PCI总线实现。-Steering gear control source, belonging to a single steering control, PCI bus.
state_machine
- pci 总线控制主模式状态机，主要功能是实现批次主模式读写功能-Main Mode pci bus control state machine, the main function is to achieve the main batch mode to read and write functions
PCIBusDesign
- 基于Verilog的PCI总线接口的设计及应用-Verilog-based PCI-bus interface design and application.
opencore_crt
- 可以在Altera QuartusII下编译的Open Cores PCI桥源代码，是经过多天辛勤整理修改才完成的-Open Cores PCI bridge source code that can be compiled at Altera QuartusII. Modified under many days of hard work
pci_32tlite_oc
- 嵌入式 pci总线IP core的rtl源代码，用Verilog实现-Embedded pci bus IP core of the rtl source code, Verilog realization of
pci
- pci总线源代码，总线设计参考。适合于飓风系列FPGA设计参考。-pci bus source code, the bus design. For hurricane series FPGA design.
PCI_T32
- PCI-32转local bus-PCI-32 switch to local bus!!!!!!!!!!!!!!!!!!!!!!!
PCIbus_Verilog
- PCI总线（Slave）接口FPGA的实现代码，全部为Verilog语言源码文件，还包括测试代码，内附设计实用说明文档。-PCI Bus (Slave) interface to FPGA implementation of the code, all source code files for the Verilog language, but also test the code, included the design and practical documentation.
PCI-bus-interface-controller
- PCI总线接口控制器的FPGA设计与实现。本文档介绍了接口控制器的实现思想。-PCI bus interface controller FPGA design and implementation. This document describes the interface controller implementation ideas.
stratix_pci_kit-v1.0
- altera PCI总线接口参考设计源代码。使用PCI编译器中的mt64兆核函数实现PCI总线接口-altera PCI bus interface reference design source code. Using the PCI Compiler mt64 trillion nuclear functions for PCI bus interface
PCI-BUS-With-FPGA-Design
- PCI总线协议的FPGA 实现及驱动设计-FPGA implementation of the PCI bus protocol-driven design ...
PCI-bus-core-working-mechanism
- 很好地学习资料：PCI总线核心工作机制分析-Learning information: PCI bus core working mechanism
PCI
- PCI总线仲裁参考设计Verilog代码，包括一些说明文件-PCI bus arbitration reference design Verilog code, including some documentation