利用译码程序在FPGA/CPLD中实现16进制数的译码显示.通过EDA原理图设计方法利用prim库中7448芯片进行7段译码显示-Using decode program FPGA/CPLD realized in hexadecimal number decoding display. Through the EDA principle diagram design method using the prim library 7448 chips for 7 period of decodin