搜索资源列表
veriloghdl135
- vhdl的学习资料，教程，一起进步，共勉-VHDL learning materials, curricula, progress together, share!
VHDL_of_example
- 此 为 VHDL 的示例程序,由于最近毕业设计要求使用这个编程,自己收集并整理了一些,供学习使用,希望和大家共同进步,有兴趣的也希望能和我一起讨论交流-this as examples of VHDL procedures, due to the recent graduation design requirements using the program, their collection by some for learning, hope and common progress. Inte
mux16_1
- 本程序实现了对输入数路的16选1功能，需要的同志可以研究研究，共同进步-the realization of the import of a number of routes 16 election a function, the comrades need to be studies, and common progress
61EDA_D721
- 8*8乘法器设计，和大家共享，互相学习，共同进步-8* 8 multiplier design, and for all to share and learn from each other and progress together
EBCode21
- 功能很强大！！！希望大叫多多指教，共同进步，一块发展-Function is very powerful! ! ! Hope that the exhibitions shouting and common progress, a development
VHDL_src_files
- 这些是我在学习VHDL语言的过程中，自己试验过的以及自己编的一些程序，希望上传和大家分享一下，共同进步！谢谢！-These are my VHDL language in the learning process, and tested their own some of the procedures, I hope to upload and share with you, and common progress! Thanks!
mux4
- 这是个四输入乘法器，还可以进步扩充端口-This is a four-input multiplier, but also the progress of the expansion of port
Vhdl1
- Top Level VHDL Code -- simulate the relatively slow progress of an elevator car by dividing the -- clock down by an outrageously high number and scanning the car registers for -- an elevator s next -- (normally the signals used below wo
zhengtaoEDAtest
- FPGA入门级学习，自己试验过的VHDL程序，实践学习后进步很快。-Entry-level FPGA learning that he tested the VHDL program, after learning the practice of making rapid progress.
synplify_for_xilinx
- 英文资料，综合工具synplify 对xilinx的支持。英文不错的进-Information in English, integrated tools synplify on xilinx support. Good progress in English
RunningLED(1)
- 很有用的 希望帮到大家学习vhdl语言 我们大家一起去的进步-Useful to help them to learn vhdl want us to go with the language of progress
res
- 基于FPGA的六路抢答器的设计，是我毕业设计中的一部分内容，花了很长时间编写的，通过的仿真和实验调试，希望大家喜欢，一起交流，一起进步-FPGA-based design of six-way Responder is my part in the graduation, took a long time writing, through the simulation and experimental testing, hope you like it, with the exchange, t
VHDL-Responder-Course-Design
- 开始键按下后，8个进度指示灯依次点亮，之后开始抢答。4个按键开关代表4个抢答键，由数码管显示最先按下的开关序号，表示此号码抢答成功。若在进度灯全亮之前有任意键被按下，则表示有人犯规！系统结构描述：此系统共包括4个板块，分别是输入板块、计数器板块、数码显示器板块、判断板块，各功能组合一起构成一个完整的抢答器。-Start key is pressed, 8 progress lights were lit, and then answer in the beginning. 4 key switc
Verilog
- verilog数字系统学习教程，设和不同人群，通俗易懂，共同学习进步-verilog digital system tutorials, design, and different groups of people, easy to understand, common learning progress
Verilog-HDL
- 本文档提供了非常完整的Verilog HDL语言代码源程序，希望大家多多借鉴，我们一起进步，谢谢！-This document provides very complete Verilog HDL language code source program, hope everybody many reference, we together with progress, thank you!!!!!
spi-uart
- 这个程序是C8051F30x设备通过 spi 通讯然后从串口发送的例程 具有 spi 跟串口的初始化操作-This program sets up the GPIO pins on the C8051F30x device for the correct functionality, then uses the SPI_Transfer function to send and receiveinformation through the SPI pins. As information
VHDL
- 本设计中选用目前应用较广泛的VHDL硬件电路描述语言，实现对路口交通灯系统的控制器的硬件电路描述，在Altera公司的EDA软件平台MAX+PLUSⅡ环境下通过了编译、仿真，并下载到CPLD器件上进行编程制作，实现了交通灯系统的控制过程。-And select and use Descr iption Language applying broader VHDL hardware circuit at present in capital being designed, the hardware
VHDL-130example
- 收集的130例的Verilog语言设计实例，真心奉献，大家一定要努力学习，共同进步。-Collected 130 cases of Verilog language design example of genuine devotion, we must strive to learning and common progress.
FPGA-teach1
- 这是一种Verilog语言的学习资料的第一部分，能够很深入的帮助学习进步-This is the first part of a Verilog language learning materials, and can be very in-depth help learning progress
C_COMPARE_V1_0
- 针对Xilinx器件的关键库文件，该库文件实现了比较器的功能，能够加快项目的进度！-The key database file for Xilinx devices, the library implements the comparator function, to expedite the progress of the project!