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Hardware_Multiplier
- 用VHDL写的硬件乘法器，以及测试过了，一个时钟周期内完成乘法运算。被乘数、乘数的宽度通过通用属性GENERIC参数改变而轻松改变，硬件除法器也快好了。-Written by VHDL hardware multiplier, and tested, and a clock cycle multiplication. Multiplicand, multiplier width parameter changes through the common property of GENERIC an
jop
- ALL VHDL FPGA -- THIS WORK CONTAINS TRADE SECRET AND PROPRIETARY INFORMATION WHICH IS THE PROPERTY OF -- MENTOR GRAPHICS CORPORATION OR ITS LICENSORS AND IS SUBJECT TO LICENSE TERMS.
Altera_Embedded_Peripherals_Handbook
- Altera公司原版资料，嵌入式设备handbook。-The handbook you are holding (the Altera Embedded Peripherals Handbook) describes Intellectual Property (IP) cores provided by Altera® for embedded systems design. The following is true of all cores described in
base-on-FPGA-embeded-system-design
- 摘 要： 可编程片上系统设计是一个崭新的、富有生机的嵌入式系统设计技术研究方向。本文在阐述可编程逻辑器件特点及其发展趋势的基础上，探讨了智力产权复用理念、基于嵌入式处理器内核和xilinx FPGA的SOPC软硬件设计技术，引入了基于英特网可重构逻辑概念并提出了设计实现方法，为基于FPGA的嵌入式系统设计提供了广阔的思路。-Abstract: Programmable System on Chip design is a new and vibrant direction of embedded
Faraday_rtl
- These designs were developed by Faraday Technology Corporation, a fabless ASIC vendor and silicon Intellectual property (SIP) provider in order.-Faraday Technology Corporation, a fabless ASIC vendor and silicon Intellectual property (SIP) provider in
altera-cyclone-data-sheet
- Altera结合带有软件工具的可编程逻辑技术、知识产权（IP）和技术服务，在世界范围内为14,000多个客户提供高质量的可编程解决方案。-Altera combines the programmable logic with software tools, intellectual property (IP) and technology services worldwide to more than 14,000 customers with high quality programmable
nansflash
- NANDFlash存储器作为一类非易失性存储器，具有功耗低、读写快、容量大、成本低、抗震性好等优点而被广泛应用于各种嵌入式系统。 - The NANDFlash memory takes a kind of nonvolatile storage, has the power loss to be low, the read-write is quick, the capacity is big, the cost is low, the anti-knocking property go
Modelsim-functional-simulation
- 介绍了Model Technology 公司的Modelsim XE II v5.6e的主要结构、属性设置、Modelsim XE II v5.6e与ISE5.2的软件接口，测试激励文件的建立以及Modelsim仿真分析方法。Altera公司QuartusII3.0仿真器(Simulator) 的主要结构、属性设置以及仿真分析方法。 -Introduced the Model Technology Modelsim XE II v5.6e company' s main struct
Electronic-Lock-(VHDL)
- 开锁代码为2位十进制并行码。 当输入的密码与锁内的密码一致时，绿灯亮，开锁；当输入的密码与所内的密码不一致时，红灯亮，不能开锁。 密码可由用户自行设置。 密码可由七段数码管显示出来。 -The design is based on the VHDL language, using the MAX+ plusII parallel electron two locks design, and design process described in detail. VHDL lan
ldpc-decoder-code
- Specify the decision method used for decoding as one of Hard decision | Soft decision . The default is Hard decision . When you set this property to Hard decision , the output is decoded bits of double or logical data type. When you set this property
axi_ipif_v2.3
- The AXI4-Lite IP Interface (IPIF) is a part of the Xilinx family of Advanced RISC Machine (ARM) Advanced Microcontroller Bus Architecture (AMBA) Advanced eXtensible Interface (AXI) control interface compatible products. It provides a point-to-point