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LCD.rar
- 有限状态机的设计——LCD显示控制实验，用VHDL编写程序，整片报告,Finite state machine design- LCD display control experiments, using VHDL programming, the whole report
shuzizhong
- 设计一个能进行时、分、秒计时的十二小时制或二十四小时制的数字钟，并具有定时与闹钟功能，能在设定的时间发出闹铃音，能非常方便地对小时、分钟和秒进行手动调节以校准时间，每逢整点，产生报时音报时。 实验平台： 1. 一台PC机； 2. MAX+PLUSII10.1。 Verilog HDL语言实现,还有完整的实验报告-The design of a can be hours, minutes, seconds time of 12 hours or 24 hours system, d
jishuqi
- 本文十一个计数器的实验报告，阐述了设计的思路，设计的具体方案，以及上机操作的步骤，描述非常详细！-This article counters 11 Experimental report on the design ideas, design specific programs, as well as steps on the machine, described in great detail!
ADC0809-
- ADC0809 采样控制电路设计报告 状态机实现方式-ADC0809 sampling control circuit design report state machine implementations
VHDL5.2
- In this report the design, implementation and testing of a Combination State Lock Machine from the given information, all of the design steps will be carried out using altera Max Plus II software package.
Automatic-pencil-sharpener
- 针对自动售铅笔机的数字逻辑设计，开发工具为Quartus II 5.1。内含完整报告和可运行程序文件。可做学习参考，于君共勉。-Pencil vending machine of digital logic design, development tools for the Quartus II 5.1. Containing the full report and run the program file. Do as a reference in the king of mutual enc
s5
- 清华大学电子系 时序逻辑实验报告 包括：触发器设计，计数器设计，累加器设计，序列检测器设计/有限状态机实现-Tsinghua University, Department of Electronics, sequential logic test report include: trigger design, counter design, accumulator design, the sequence detector design/finite state machine