搜索资源列表
VHDLsample
- 英国诺森比亚大学的vhdl语言例程集锦，英文原版。 包含很多优秀的VHDL语言范例，可供学习。所有程序均可在符合IEEE标准的模拟器上模拟。-This file contains a selection of VHDL source files which serve to illustrate the diversity and power of the language when used to describe various types of hardware. The exampl
meanFilter
- This is a variable length window averaging filter that uses an MCP3002 ADC with SPI interface to sample an analog input, and has a PWM that can be run through a low-pass filter to produce an analog output. The design was simulated in Modelsim with no
simple_spi
- complete spi core written in vhdl. its easy to use and can be configured to operate at various clock frequencies. tested on an ADC to verify the operation
l1ghVhVI
- The VSPI core implements an SPI interface compatible with the many -- serial EEPROMs, and microcontrollers. The VSPI core is typically used -- as an SPI master, but it can be configured as an SPI slave as well.
VHD_Veri_spi
- 一个强大的符合SPI规范的VHDL/Verilog源码文件，传输模式和时钟相位均可以指定，采用同步时钟设计，可以工作在很高的频率下。支持主机及从机模式，强烈推荐使用！-A strong line with SPI standard VHDL/Verilog source files, transfer mode, and clock phase are to specify, using synchronous clock design can work in very high frequen
CoreSPI
- 数字电子设计fpga设计的spi接口的ip_core，可以直接用于在fpga设计，支持actel的fpga芯片，支持主从模式，fifo大小可选。-Fpga design of digital electronic design spi interface ip_core, fpga design can be directly used to support actel the fpga chip, support master-slave mode, fifo size options.
spi
- 描述了总线的vhdl程序，并且有测试语句的描写 仿真之后可以实现-Describes the bus vhdl program, and a test statement, after describing the simulation can be achieved
SPI
- Verilog编写的SPI程序，含英文原文档说明，很全的-The OpenCores simple Serial Peripheral Interface core is an enhanced version of the Serial Peripheral Interface found on Motorola s M68HC11 family of CPUs. The Serial Peripheral Interface is a serial, synchronous comm
SPI-desgn.zip
- 同步串行外设接口，它可以使MCU与各种外围设备以串行方式进行通信以交换信息。传输的数据为8位，在主器件产生的从器件使能信号和移位脉冲下，按位传输，高位在前，低位在后。,Synchronous serial peripheral interface, it can make the MCU with a variety of peripheral devices to communicate in order to exchange information in a serial manner.
SPI
- SPI接口程序 可以直接应用。 -SPI interface program can be applied directly.
spi
- 该程序是一个可完成订制化的SPI双向总线接口，时钟相位、极性，以及分频比全部可通过寄存器进行配置，已经在ISE下通过综合，占用资源少，强烈推荐 -The program is a complete custom of SPI bidirectional bus interface, clock phase, polarity, and the divider ratio can all be configured through the register, has been in the I
AD9957-SPI
- 内含AD9957的SPI配置程序，输出为单音。目前该程序仅给出三个寄存器的配置，如有需要，简单阅读程序，即可对程序进行修改，本人项目中使用的为该配置程序，能成功输出各种MPSK波形。-The AD9957 contains SPI configuration program, the output is mono. Currently, the program gives only three registers configuration, if necessary, a simple rea
SPI
- FPGA SPI部分代码，FPGA芯片采用xilinx sptan3e 可以实现FPGA的SPI的通信,用来控制外部74hc595-FPGA SPI part of the code, the FPGA chip using xilinx sptan3e can realize SPI communication, FPGA is used to control the external 74hc595 are needed
SPI
- 一种基于FPGA，Verilog语言的SPI总线实现方式，顶层添加自己想要传输的内容到相应的地址就行，百分百可以。-Based FPGA, SPI bus implementations Verilog language, the top add your own content you want to transfer to the appropriate address on the line, can be hundred percent.
ad9516-4
- ad9516-4芯片的初始化程序，可以方便对各内部寄存器的配置，达到对时钟的分频控制。(the code of ad9516-4 for initial,it can config the register of all through spi interface.)
工作簿1
- 主要关于合肥工业大学计算机方面的知识，有数据结构，计算机组成原理，java，面向对象，(Just hole teacher talk, so that six new development of the party, you find a time, with the volunteer book, together to find the blue Secretary talk, @ Wang Kuo, you're responsible for this thing, a common
spi_slave_test
- 实现spi协议的从机代码，亲测可用。按照字节接收，发送可以实现一次发送19字节，可按照需要更改。(The implementation of the code of the SPI slave protocol is available. By byte received, sending can be sent to send 19 bytes at a time, which can be changed as needed.)
spi_master
- 用Verilog写的SPI代码，可读可写，刚仿真完，还没上板，尴尬，主要是官方限制不上传就不能下载～～～～～～～～～～～～～～ 下面的英文是百度翻译过来的，鬼畜的我都不知道啥意思～～～～(The SPI code written in Verilog is readable and writable. After the simulation is finished, it is not yet on board. Awkwardly, it is mainly that official r
spi_8r8w
- 同时实现多个SPI从设备的连续读写，读写字节数可变化(implement multiply spi slave read/write operation, and the operation's bytes can be changed)
spi_master
- 用verilog编写的SPI代码，这个代码是FPGA作为主机可以发送和读取数据，上板验证过，我测试的时候SPI的CLK速率是5M，读写都没问题，稳，至于更高的速率没测试过。 下面鬼畜的百度翻译大家就不要看了，我不知道他想表达啥意思～(SPI code written in Verilog, the code is FPGA as the host can send and read data, the upper board verified, when I test the SPI CL