搜索资源列表
Spartan3E.rar
- Spartan3E的LCD字符滚动显示源程序，具体内容见注释,Scroll Spartan3E character LCD display the source code, see the specific contents of the Notes
USB2.0IP.rar
- 完整的用VERILOG语言开发的USB2.0 IP核源代码,包括文档,Complete Verilog language developed by USB2.0 IP core source code, including documentation
DW8051.rar
- Synopsys 公司的DW8051源代码，用verilog编写的，代码很完整，可以仿真，对采用8051核做嵌入式的人很有帮助,Synopsys company DW8051 source code, written with Verilog, the code is complete, can be simulated using 8051 nuclear helpful people who do Embedded
robertvision
- 基于FPGA的嵌入式机器人视觉识别系统模块源代码，也包括了所有硬件设计资料，是VERILOG格式-Embedded FPGA-based Robot Vision Recognition System module source code, including all hardware design information
rs232
- 完整的RS232 Verilog源代码，支持波特率可调，支持调试命令，配合串口调试工具，可作为FPGA开发中的调试平台。-Full RS232 Verilog source code, support for baud rate is adjustable to support debugging command, with the serial debugging tools can be used as the debugging FPGA development platform.
sdram-source
- SDR SDRAM 控制器的源代码 altera公司的-source code from altera
tetrix_vhdl
- 使用vhdl实现的俄罗斯方块，包含mds图和源代码-Tetris using vhdl implementation, including diagrams and source code mds
PS2
- 基于EPM1270的PS2键盘鼠标驱动源码Verilog-Based on the EPM1270 the PS2 keyboard and mouse-driven Verilog source
Am29lv160d
- 在逻辑的系统仿真中使用的FLASH模型（AMD的Am29lv160d），包括VHDL代码文件和verilog代码文件和testbench，并且有相应的pdf说明文档。-In the logic system used in FLASH simulation model (AMD s Am29lv160d), including VHDL and Verilog source code files of documents and testbench, and the corresponding
oc_mkjpeg
- Pure hardware JPEG Encoder design. Package includes vhdl source code, test bench, detail design document. Written in VHDL. Verified on Xilinx XC4VLX25. Rncode 320x240 bmp picture in 3ms at 50 quality, 100Mhz clock.-Pure hardware JPEG Encoder design.
pci_verilog
- 一个pci接口的硬件描述语言的实现源代码,用verilog语言实现-a pci interface hardware descr iption language source code to achieve with verilog language
PS2Fpga
- PS2开发源代码，取自于FPGA开发板，可直接应用于实际项目中-PS2 development of source code, derived from FPGA development board can be directly applied to actual projects
pre_norm_sqrt
- 一种用VHDL语言描述的浮点平方根前规格化的源代码编程-VHDL language used to describe a floating-point square root of the source code before the standardized programming
display_control
- 一个LCD控制器的verilog源代码，可以方便的控制TFT LCD！-An LCD controller Verilog source code, can easily control TFT LCD!
Source
- I2C 控制器的 Verilog源程序2-I2C controller Verilog source 2
Fifo
- 一个FIFO源代码，基于Altera FPGA-A FIFO source code, based on Altera FPGA
seven
- 这是我在ISP编程实验中独立编写的采用结构化描述的一个七人表决器，通过独特的3次映射一位全加器的方法从而实现七人表决器的功能，与网络上任何其他的七人表决器源码决无雷同。-This is my ISP programming in an independent experiment using a structured, prepared as described in a seven-member voting machine, through a unique 3 times a full a
sin.tar
- 神奇的sin波生成verilog源码，非常简单的代码无需乘法即可生成sin,cos，值得搞算法的人借鉴-Magic sin wave generated Verilog source code, the code is very simple multiplication can be generated without sin, cos, worthy people from engaging in algorithm
rs-codec-8-16
- RS[255,223]纠错码verilog源码，包含编码和解码模块，以及testbench等。-Verilog source code for RS[255,223] encoder and decoder, with testbench included.
profiles
- source code of counter,ram,lfsr etc