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juanji2
- 用TI DSP汇编指令进行程序设计:“TIC54XDSP汇编程序设计-卷积-compiled using TI DSP Programming instructions : "TIC54XDSP compilation of program design-convolution
c_xapp753
- 使用 EMIF 将 Xilinx FPGA与 TI DSP 平台接口
experiment2_dsp_software_design
- 實習目的 本實驗將練習如何運\用 DSP EVM 產生弦波。使學生能夠加深瞭解 TMS320C6701 EVM 發展系統的基本操作,及一些周邊的運\作。 藉由產生弦波的實驗,學習如何使用硬體及軟體。在軟體部份,使 用 Code Composer Studio(CCS) ,包含 C 編輯器、連接器(linker)和 TI 所提供的C源始碼偵錯器(debugger) 。在硬體部份包括TMS320C67 的 浮點 DSP 和在 EVM 板子上的類比晶片。
CPLD读取ADS7886
- CPLD读取Ti串行ADC芯片ADSL7886的Verilog代码
DAC5687 interface
- TI DAC5687 interface of the verilog
ADS8328
- 高速精密ADC,TI公司的ADS8328的FPGA控制程序,使用verilog语言-High-speed precision ADC, TI s ADS8328 control program the FPGA using verilog language
Dac
- 这是一款用VHDL语言编写的对外部DA芯片的控制程序,所用DA转换芯片是TI公司的TLC5615.-This is a VHDL languages used on the external DA chip control procedures, using DA converter chip is TI
fpga_ads8364
- fpga控制ti的多通道高精度ad芯片ads8364的verilog源码-fpga multi-channel high-precision control ti ad-chip ads8364 the verilog source code
ad_da_ctr
- 基于FPGA的ad和da转换Verilog代码,FPGA采用ep2c5芯片,做成异步fifo,ad芯片采用TI的ths1230,da芯片采用TI的TLV5619,仿真结果基本正确。-FPGA-based ad and da conversion Verilog code, FPGA using ep2c5 chip, made ??of asynchronous fifo, ad-chip using TI s ths1230, da chip uses TI s TLV5619, simula
XilinxisdisclosingthisSpecification
- Xilinx is disclosing this Specification ? 第 1 章“EMIF 概述”,概述 Texas Instruments EMIF。 ? 第 2 章“Virtex-II 系列或 Spartan-3 FPGA 到 EMIF 的设计”描述将 TI TMSC6000 EMIF 连接到 Virtex?-II 系列或 Spartan?-3 FPGA 的实现。 ? 第 3 章“Virtex-4 FPGA 到 EMIF 的设计” 描述将 TI TMS320C6
cd4000x
- CD4000 双3输入端或非门+单非门 TI CD4001 四2输入端或非门 HIT/NSC/TI/GOL 双4输入端或非门 NSC CD4006 18位串入/串出移位寄存器 NSC CD4007 双互补对加反相器 NSC CD4008 4位超前进位全加器 NSC CD4009 六反相缓冲/变换器 NSC CD4010 六同相缓冲/变换器 NSC CD4011 四2输入端与非门 HIT/TI CD4012 双4输入端与非门
tlc5510
- TI公司的TLC5510的用VHDL写的控制器及其仿真-TI' s TLC5510 use the controller to write VHDL and its simulation
c54x_verilog
- TI 的TMS320C54X的DSP的芯片软核verilog源代码,可以帮助初学者深入了解该系列DSP片内资源核结构,值得参考!-TMS320C54X of TI' s DSP chip soft-core verilog source code, can help beginners a better picture of the family of DSP-chip resources, nuclear structure, it is also useful!
ss_pcm
- It was tested on a XESS XCV800 board interfacing to a proprietary device with a TI DSP, exchanging PCM streams in both directions.
Code1
- This is a code for wireless point-to-point communication using Altera FPGA and TI s CC2500 transceiver-This is a code for wireless point-to-point communication using Altera FPGA and TI s CC2500 transceiver
THS1206
- FPGA来实现数据采集,AD采用TI公司的THS1206,高速并行AD,内含16字FIFO,降低硬件复杂度。-FPGA to realize data acquisition, AD using TI company s THS1206, high-speed parallel AD, containing the 16-character FIFO, to reduce hardware complexity.
altpll0
- 锁相环的证实程序,可以在任何编译器中执行,但是要是TI公司的平台。-Confirmed by phase-locked loop process can be run on any compiler, but if TI' s platform。
Intel-Atom-Z5xx-TI-power
- 用于 Intel Atom Z510、Z530 和 Z5xx 平台的 TI 电源解决方案.rar-For the Intel Atom Z510, Z530 and Z5xx TI Power Solutions platform. Rar
hsadc
- ADC ADS62P49 It is TI adc verilog source code for
2011-04-27-Stepper-motor-control-TI-DRV8332DKD.zi
- Stepper-Motor Control for TI-DRV8332DKD. Operation with steps of N kHz, while n > 1. Functionality: Forward, backward, hold, stand-by