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UART_verilog
- 用Verilog写的串口程序，是每一个学习Verilog的人的入门第一步-a uart port code of Verilog，which is the first project for beginners
verilog_rs232
- 用verilog实现串行口UART控制器，适用于XILINX器件-verilog UART controller
jiyuchuankoujishu
- 计算机在HDL语言下实现串口技术,UART相关资料-BASIC IN HDL language,chuankou jishu
UART
- verolog语言编写，功能如标题所示。有问题请联系mxkmxm@126.com-verolog language, functions such as the title indicates. There are problems, please contact mxkmxm@126.com
usefulUART
- UART是广泛使用的串行数据通讯电路。本设计包含UART发送器、接收器和波特率发生器。设计应用EDA技术，基于FPGA器件设计与实现UART。 -UART is a widely used serial data communication circuits. This design includes UART transmitter, receiver and baud rate generator. Design and Application of EDA technology, ba
uart2
- a small uart implementation with Verilog
example
- 我FPGA开发板的程序！！！包括数、码管iic、VGA、乘法器、串口。加法器、比较器、状态机等等等了，主要是VHDL的也有部分好似Verilog的。参考下吧-verilog...vga..uart...add...etc..
UARTVHDL
- UART是广泛使用的串行数据通讯电路。本设计包含UART发送器、接收器和波特率发生器。设计应用EDA技术，基于FPGA/CPLD器件设计与实现UART。-UART is a widely used serial data communication circuit. The design includes UART transmitter, receiver and baud rate generator. Application of EDA design technology based o
UART_prj_ViHDL
- vhdl project at sbu uni in iran uart
Deadline
- file on xilinx code using rs232 with interfacing uart
transfer
- 实现UART的发送功能，采用了状态机来描述其功能。-Achieve UART transmit function, using the state machine to describe its function.
UART_VHDL
- UART VHDL component
uart
- 一个功能很强大的异步串口例子，用vhdl完成，波特率等参数可以调整。-A feature very powerful example of asynchronous serial interface, complete with vhdl, baud rate parameters can be adjusted.
uart_core(V2_0)
- 本例为自己编好的VHDL的基于uart的FPGA的 设计。-In this case for their own good VHDL code uart of FPGA-based design.
RS232_NIOS_Verilog
- 5个文件，包含了RS232的nios实现和Verilog实现方式。其中,RS232的nios核实现只需要按照文件描述可以轻松实现^_^，个人比较推荐！RS232的Verilog实现需要编程，例程方便使用。RS232正在进一步学习中，有兴趣的可以探讨。-the realizition of rs232 interface by niosii uart ip core of Altera.it seems a most conveniet way.
uart
- verilog实现的按键控制的串口简单收发通信-verilog implementation simple keypad control, serial communication transceiver
UART
- 本模块的功能是验证实现和PC机进行基本的串口通信的功能。
send
- 串口发送子程序verilog 串口发送子程序verilog -uart send verilog
uart
- 用VHDL编程，在FPGA上实现串口的控制！希望一切分享一下！-Using VHDL programming, the FPGA, Serial control! Hope that all share!
uart
- 串口通信程序，硬件描述语言VHDL，代码简洁，功能完善-Serial communication program, hardware descr iption language VHDL, the code simple and functional. . .