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uart from opencores
- 用VHDL实现串口 可以实现与pc机的通信 收发 中断都可以 效果比较好-VHDL implement serial port, it can communicate with pc, it can accept and send message, and it can be interrupted.
VHDL语言的UART串行接口芯片程序
- VHDL语言的UART串行接口芯片程序
uart.rar
- VHDL语言编写的全功能串口模块(包含DTR,RTS等管脚),在CPLD器件上测试通过,VHDL language, full-featured serial modules (including DTR, RTS pin, etc.), in the CPLD device test
uart.zip
- uart串口通信程序,用状态机实现的;测试通过,并且实践过,uart
UART
- 利用FPGA接受232芯片的串口数据,可以与PC进行串口通信-FPGA chip using the serial data received 232, serial communication with PC
uart
- 采用VHDL语言编写的串口驱动程序,已调试通过,能够实现同PC机的数据传输,可读性好,可移植性好-VHDL language using the serial driver has been debugged, to achieve the same PC, the data transmission, readable and portable
标准的串口通讯设计VHDL
- 标准的异步串口通讯设计程序——基于VHDL编程-communication design programme of standard asynchronous serial port base on VHDL programme
UART
- 串口实验,很好用,我还有verilog HDL VHDL CPLD EPM1270 源代码-Serial experiments, very good, and I still have the source code verilog HDLVHDL CPLDEPM1270
uart
- FPGA的串口模块,实现FPGA与PC机的串口通讯。-FPGA serial modules, FPGA implementation with the PC-Serial communication.
87361001Uart2
- VHDL语言编写的UART串口通讯,2400Hz的波特率时钟-VHDL language UART serial communication, 2400Hz clock of baud rate
UART2_vhdl
- 这是VHDL语言的uart串口驱动 感觉很难写的 但是这个可以移植的 比较好-This is the VHDL language serial uart driver feel it is very difficult but this can be written by transplantation is better huh
UART
- 包含一个在QUARYUS环境下运行的UART的工程,实际在EP2C20Q240上调试成功的通用串口VHDL程序-The QUARYUS environment contains a UART to run the project, the actual success of the EP2C20Q240 Universal Serial debugging VHDL programs
uart_0910
- uart串口传输的verilog RTL级源码,已通过仿真验证。文件主要包含发送、接受位处理,发送、接受字节帧处理,对学习串口通信的朋友很有帮助-uart serial transmission verilog RTL-level source code has been verified by simulation. File mainly contains the send, receive digital processing, sending, receiving bytes of fr
UART
- 用FPGA开发的串口通信的程序,代码是用verilog编写的,希望对大家有用!-Serial communication with the FPGA development process, the code is written in verilog and hope for all of us!
uart
- vhdl语言的串口发送/接收模块,本人用在多个工程,很好用。-vhdl language of the serial transmit/receive module, I used a number of projects, very good use.
uart-(VHDL)
- 利用VHDL语言实现的UART串口通讯,以经过下载验证-the UART program with VHDL as develop language
FPGA-UART
- 该资料是实现VHDL的串口通信(UART),RS232接口协议,-VHDL implementation of serial communication
uart
- UART 串口收发程序 VHDL UART 串口收发程序 VHDL-UART serial port transceiver procedures VHDL
uart
- VHDL实现串口转换的代码,串行通信的发送器有五个状态:--1.X_IDLE(空闲)状态 : 当UART被复位后,状态机将立刻进入这一状态,在这个状态下, -- 状态机一直等待发送命令XMIT_CMD,当接收到发送命令后,状态机进入X_START状态,准备发送起始位信号 --2.X_START状态 : 在这个状态下,UART发送一个位时间宽度的逻辑'0',信号至TXD,即 -- 起始位,紧接着状态机进入X_SHIFT状态,发一位数据 --3.X_WAIT状态 : 当状态机处于这一个状态时
串口电压表VHDL
- 使用 AD 转换器 TLV1570,将 0-2.5V 的电压转换成 10 位二进制结果,再将 10 位二进制结果转换成 4 位 BCD 码 (整数部分 1 位,小数部分 3 位),并通过 UART 串口将数据送上位机 (电脑)进制显示(Serial port voltmeter)