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video_form_convert
- 将ADV7181解码出来的数字视频，提取亮度信号作为视频输出。-The ADV7181 decoded digital video, the luminance signal is extracted as a video output.
video_shape_center
- FPGA将二值化的视频提取目标的位置信息，最终计算出目标的型心。-FPGA binarized video extract location information of the target, the final calculation of the target core.
vga_lcd_latest.tar
- 该OpenCores的增强VGA/ LCD 控制器核心提供了VGA 能力的嵌入式系统。它 同时支持CRT和LCD显示器 与用户可编程的分辨率 和视频定时，从而提供了 几乎所有可用的兼容性 LCD和CRT显示器。-The OpenCores Enhanced VGA/LCD Controller Core provides VGA capabilities for embedded systems. It supports both CRT and LCD
vga
- vga This details a VGA controller component that handles VGA signal timing, written in VHDL for use with CPLDs and FPGAs. Figure 1 illustrates a typical example of the VGA controller integrated into a system. As shown, the VGA controller requires a
VITA2000_Sensor_Board
- 安富利关于视频开发的资料，使用FPGA设计。-Avnet information on video development, the use of FPGA design.
ML605_RX_H264
- H.264视频压缩硬件语言，基于ＦＰＧＡ的设计语言。非常棒的语言设计-Solution of H.264 video compression hardware design language, based on FPGA language
Tetris_final
- FPGA俄罗斯方块。 -采用VHDL编写，该游戏支持PS2键盘输入，VGA视频输出，游戏可以选择不同难度，同时可以记录显示游戏得分。-FPGA Tetris. - Use of VHDL, the game supports PS2 keyboard input, VGA video output, the game can choose different difficulty, while records show game scores.
10_CMOS_OV7725_RGB640480
- 采用FPGA EP4CE开发的OV7725摄像头视频采集系统，采用Verilog实现-Using FPGA EP4CE developed OV7725 camera video capture system, using Verilog realize
Verilog_prj
- 特权同学BJ-EPM240 CPLD开发板配套视频源码文件，ex1~ex15全，是入门Verilog的首选。-Privileged students BJ-EPM240 CPLD development board supporting the video source files, ex1 ~ ex15 whole, is the first choice of entry Verilog.
ov7670-1
- ov7670摄像头FPGA数据采集、显示模块，测试可用-ov7670 camera, verilog code, video capture and display
NIOSII_VGA_Controller
- Nios II VGA Controller with DMA The Nios II VGA Controller with DMA is an SOPC Builder component which can be added to any SOPC Builder system to provide VGA display capability. The controller is capable of displaying the following resolutions
image_combine_v
- 用于在FPGA中实现图像叠加字幕，字符为FPGA内部rom存储的点阵。-combine word on video stream in FPGA
SRC_2CH
- 2通道HDCVI视频光端机：实现两个高速AD转换采集HDCVI信号，编码扰码后通过光纤远距离传输，对端收到后解码通过高速DA转换为HDCVI信号。-2 channel HDCVI video Guangduan Ji: two high-speed AD acquisition signal conversion HDCVI, scrambling code via the optical fiber remote transmission, receives an end after deco
VGA_RGB_color-bar
- FPGA EP4CE40F23C6 VGA显示RGB彩条实验 学习视频的时序-FPGA EP4CE40F23C6 VGA display RGB color of experiential learning video timing
h264
- This is an example top level module for the H264 submodules. Each implementation will differ at the top level due to differing number of video streams, resolution, and RAM type and interface. This is thus just a skeleton implementation.- T
soft_hdmi
- 模拟adv7619 hdmi 4k视频输出信号-Analog adv7619 hdmi 4k video output signal
8_MIPI_to_HDMI_Terasic
- altera max10 mipi demo,有mipi ip core的使用，是第3放提供，需要lic，但是可以借鉴其使用方法，有HDMI接口，很适合树莓派学习参考-altera max10 mipi demo，using mipi ip core，but it need lic file. HDMI also be use in the design and it is useful for video development
project_6
- YCbCr 颜色空间按照采样率的不同可分为YCbCr444 和YCbCr422、YCbCr420 等， YCbCr422 在视频处理中较为常用，与YCbCr444 相比节约1/3 带宽和存储空间。代码功能是实现YCbCr444 转YCbCr4-YCbCr color space in accordance with the sampling rate can be divided into YCbCr444 and YCbCr422, YCbCr420 etc., YCbCr422 more
video_add_program
- 基于verilog语言通过SPI通信实现视频叠加系统 -Video overlay system based on Verilog through SPI
clip_viseo
- 视频旋转 连续写，离散读，为了提高效率，分块突发读写。-video rotate