搜索资源列表
count_usebasketball
- 一个小程序，用Veilog HDL编写的，可以用于篮球比赛的倒计时牌，已在max-plusII上仿真通过。-a small program, prepared by the Veilog HDL, can be used for the basketball game countdown. have max-plusII on through simulation.
FPGA.rar
- 24秒倒计时设计用于专业篮球比赛有说明和一系列程序代码,24 seconds countdown designed for professional basketball game and a series of procedures has made it clear that the code
lanqiu24s8
- 篮球24s计时。计时器递减计数到零时，数码显示器显示‘0’并停止，同时发出报警信号-basketball 24 seconds
lanqiujishiqi
- 这是篮球计时器，vhdl源代码，包括12min倒计时，24sec倒计时-basketball game time paly.including 12min，24sec……
basketball
- 30秒篮球倒计时设计程序源码及仿真原码，下载即可用-30 basketball countdown procedures and simulation of the original source code
baskterballconter
- 这是一个关于篮球24秒计数的Verilog程序，程序中包含了开始，暂停，复位键。-This is a matter of 24 seconds count basketball Verilog procedures, the procedures included in the start, pause, reset button.
clock10
- 篮球24秒计数器。用Verilog语言编写，在maxplus2中编译运行。适用于大部分FPGA开发板，但必须更改引脚分配。-24 seconds counter basketball. Verilog language used in compiling maxplus2 run. Applicable to most FPGA development board, but must change the pin assignment.
Basketball
- 此程序是关于篮球计数器的FPGA的代码，用的是ALTERA的板子
basketball
- Verilog编写的篮球比赛24秒计时器，有复位、暂停等功能-Written in Verilog basketball game 24 seconds timer, a reset, and pause
clock
- 大学生篮球比赛30S计时器-30S college basketball game timer
main
- 篮球24秒计时程序，用于篮球比赛快结束时的倒计时-24 seconds counting for basketball game
24stimer
- 篮球24s定时器的verilog代码，内涵代码以及程序逻辑说明-basketball 24s timer code of verilog
basketball24
- 基于FPGA的篮球24秒计时器，开发环境为MAXPLUS-24 second timer in the FPGA-based basketball,Development environment for MAXPLUS
30S_basketball
- 设计了篮球竞赛30秒计时器。此计时器功能齐全，可以直接清零、启动、暂停和连续以及具有光电报警功能，同时应用了七段数码管来显示时间。此计时器有了启动、暂停和连续功能，可以方便地实现断点计时功能，当计时器递减到零时，会发出光电报警信号。-It designed a 30-second timer basketball competition. This timer functions, can be directly cleared, start, pause, and a row and a ph
untitled3
- 篮球24秒计时器，实现24秒计时，每到24秒蜂鸣器报警-Basketball 24 second timer 24 seconds, every 24 seconds a buzzer alarm
verilog-example
- verilog基础实验，包括篮球计数器，序列检测计等-verilog based experiments, including basketball counter sequence detector
basketball-counter
- 篮球机分区，显示两个队的得分分为两个方向积分，每次加1或者减1-basketball counter
24
- 基于6M晶振FPGA的篮球24秒计时器verilog HDL代码，附testbench-Verilog HDL code for FPGA-based 6M crystal basketball 24 seconds timer, with testbench
cnt24
- VHDL24秒篮球倒计时,VHDL编写，实现23到0计数。quartues ii 9.1编写的。-VHDL24 sec basketball countdown, written in VHDL, to achieve 23 to 0 count. Quartues written in II 9.1.
baskball
- fpga实现篮球定时器，可以两队交替得分，时间为24s-the basketball ，with time and code