搜索资源列表
liang_zhu_music_player
- 用Verilog HDL 语言编写的播放梁祝的程序-with Verilog HDL language broadcast of the proceedings Butterfly Lovers
mdct.tar
- 这是06年4月刚刚完成的程序,从opencore.org下载而来。用vhdl语言描写,以及matlab仿真,testbench,以及在xinlinx上的综合。 The MDCT core is two dimensional discrete cosine transform implementation designed for use in compression systems like JPEG. Architecture is based on parallel distribut
FPGA_SONGER
- 基于FPGA的乐曲硬件演奏电路设计的实现,有完整的VHDL代码,并有PDF详细说明如何下载及跳线设置,并“梁祝”在GW48系列开发平台上下载调试成功。音乐优美-FPGA-based hardware music concert circuit design to achieve a complete VHDL code. and a detailed account of how the PDF download and set up the jumper, and "Butterfl
diexing
- VHDL编写的蝶形变换,可用于FFT变换-VHDL prepared by the butterfly transform, FFT can be used to transform
liangzhu
- 基于max—plus2开发环境,设计的《梁祝》演奏曲-based max-plus2 development environment, the design of the "Butterfly Lovers" concert song
16bit_FFT.rar
- 16点FFT的VHDL源代码,含详细设计文档。,16:00 FFT of the VHDL source code, including detailed design documents.
butterfly.rar
- 蝶形运算,可用于DCT变换,FFT变换的模块,Butterfly computation, can be used for DCT transform, FFT transform module
music
- 设计并调试好一个能产生”梁祝”曲子的音乐发生器,并用EDA实验开发系统(拟采用的实验芯片的型号可选Altera的MAX7000系列的 EPM7128 CPLD ,FLEX10K系列的EPF10K10LC84-3 FPGA, ACEX1K系列的 EP1K30 FPGA,Xinlinx 的XC9500系列的XC95108 CPLD,Lattice的ispLSI1000系列的1032E CPLD)进行硬件验证。 设计思路 根据系统提供的时钟源引入一个12MHZ时钟的基准频率,对其进行各种分频
fft_1024_hdl
- 一个 1024 点 FFT , 基 4 蝶形运算架构, 5级流水,乒乓内存,有测试环境。-A 1024-point FFT, Radix-4 butterfly structure operation, five water, ping-pong memory, a test environment.
7
- verilog 写的 “梁祝”乐曲演奏电路-verilog wrote " The Butterfly Lovers" music concert circuit
FFTbutter
- FFT的旋转因子算法和蝶形处理器VHDL代码实现-The rotation factor FFT butterfly processor algorithm and VHDL code
gequ
- 梁祝歌曲,用vhdl语言实现,在蜂鸣器上实现唱歌功能-Butterfly song
song
- 音乐,梁祝,其中应用VHDL编写的全过程梁祝。-Music, Butterfly Lovers, in which the application of VHDL to prepare the whole process of Butterfly Lovers.
vhdlfft4
- 基4算法的vhdl实现,蝶形变换等的详细设计-Radix-4 algorithm of VHDL realize, butterfly transform the detailed design, etc.
butterfly
- 蝶形运算的VHDL代码,可以实现,没验证-VHDL code butterfly operations can be achieved, no authentication
butterfly
- 另一种蝶形运算的代码,可用quartusII6.0运用-A butterfly operation of the code, the use of available quartusII6.0
FPGA_FFT
- 基于VHDL语言的一个FFT快速傅里叶变换程序。采用4蝶形算法-VHDL language based on a FFT Fast Fourier Transform procedure. 4 butterfly algorithm used
fft_hdl
- 一个 16点 FFT 用基2蝶形运算单元完成,有测试环境。-16 points FFT with a radix-2 butterfly computation unit is completed and test environment.
butterfly
- 蝶形运算的VHDL代码 已通过quartusii编译仿真-VHDL Butterfly computing simulation code has been compiled by quartusii
butterfly1
- FFT蝶形运算单元程序,可用于OFDM,以及任何相关数字信号处理的设计中-FFT butterfly processor program can be used in OFDM, as well as any relevant design of digital signal processing