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tbcpu8bit2
- 极小的CPU的VHDL源代码，仅需要占用32个宏单元的CPLD。除了VHDL源代码还包括了汇编器的C源代码-minimal CPU VHDL source code, only occupy 32 macrocell CPLD. Apart from VHDL source code also includes a compilation of C source code
USBXilinx
- 实现了串行通信接口的全部功能，符合RS-232-C标准的完整UART模块源代码，中文注解，清晰易懂，经过严格仿真测试，绝对好用。-a serial communication interface of all functions, with RS-232-C standard UART modules complete source code, Chinese notes, lucid, after a rigorous simulation tests, absolutely useful.
8051VHDLyuandaima
- 这是用C语言编写的关于8051的VHDL的源代码-This is the C language on the preparation of the 8051 VHDL source code
source7-8
- verilog hdl教程135例:verilog hdl语言类似于C语言，便于学习。本文档带有源代码，7-8章-Verilog HDL 135 cases Guide : Verilog HDL language similar to the C language, to facilitate learning. This document with the source code, 7 - 8
source9-10
- verilog hdl教程135例:verilog hdl语言类似于C语言，便于学习。本文档带有源代码，9-10章-Verilog HDL 135 cases Guide : Verilog HDL language similar to the C language, to facilitate learning. This document with the source code, 9-10
vga_display.rar
- VGA controller源码及显示汉字和ascii字符的c代码实例，已在DE2-70上实现,vga_controller source code and c code which can display chinese charactors and ASCII code on the VGA
stopwatch
- 此程序实现计时秒表功能，时钟显示范围00.00～99.99秒，分辨度:0.01秒 采用PIC16F877单片机，6位数码管显示 开发平台：MPLAB IDE v8.30 类型：工程文件（内有C源码），已验证通过-This program achieved stopwatch function, clock display range 00.00 to 99.99 seconds Resolution: 0.01 seconds using PIC16F877 microcontro
Camera_Interface_Verilog
- 该源代码包是基于片上系统的摄像头接口的Verilog语言程序，它包括以下5部分：RTL源代码，测试平台，软件仿真C代码，FPGA综合时的sdc和ucf文件，说明文档。-This source code package is the camera interface module based on the SoC use Verilog language. It has the following 5 parts: RTL code, testbench, software simulating
c2812rtdxtest_c2000_rtw
- 由MATLAB生成的RTDX的源代码，由模型搭建，然后自动生成DSP的源代码-RTDX generated by MATLAB source code, set up by the model, and then automatically generate DSP source code
dmx512
- DMX512接收程序C源代码，DMX512接收程序-C source code of the receiving program DMX512, DMX512 receiving program
MIT_Video-Scaler
- MIT的video scaler论文，文章后面附有c和verilog程序源代码，分为水平缩放和垂直缩放-MIT video scaler papers, articles, source code attached to the back, divided into horizontal scaling and vertical scaling
display_control
- 一个LCD控制器的verilog源代码，可以方便的控制TFT LCD！-An LCD controller Verilog source code, can easily control TFT LCD!
source_code
- 一个用c语言编写的自动售货机控制器源代码-A with c language source code for vending machine controller
hdlc
- HDLC协议控制器，用FPGA实现的verilog源代码-HDLC protocol controller, implemented with FPGA verilog source code
SPWM
- 用C语言 并利用FPGA来进行SPWM 包含详尽的源代码-Using C language and use of FPGA to be SPWM source code contains detailed
ISE_lab17
- VHDL语言实现正选信号发生器，并仿真验证的源程序及代码-VHDL language is selected signal generator, and simulation and verification of the source code
Clover_VgaCvt
- cpmposite to VGA converter c-source code
timer-pwm
- 基于dspic30f2010芯片的定时器模块以及输出比较模块产生可调PWM波C程序源代码-Chip timer module based dspic30f2010 and adjustable output compare module PWM wave generated C source code
LCD1602
- 常用的显示芯片LCD1602的C源程序代码，对于初学者易理解。-Common display chip the LCD1602 of C source code, easy to understand for beginners.
DE1_D5M
- // --- --- --- --- --- --- --- --- --- --- --- -- // Copyright (c) 2007 by Terasic Technologies Inc. // -------------------------------------------------------------------- // // Permission: // // Terasic grants permission to use and mod