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exp28_20
- C++程序控制8255(C口输入, A口输出)的直流电机-8255 C program control (C mouth input, output A. I) Motor
This VHDL code pertains to the DCO model
- code.doc C.1 DCO LEVEL 2 This VHDL code pertains to the DCO model descr iption in Section 6.5.5. The entity declaration of the level 2 DCO is between lines 18 and 39. The VHDL generics or elaboration-phase parameter constants are declared between
Digital_signal_processing_with_FPGA
- 个人觉得对C的学习者有很大的帮助，是我收藏的经典之作，希望对大家有所帮助-Personally feel that for C learners be very helpful to my collection of classic, I hope all of you to help
xapp529_6_1
- 一些有用的IP核，本人也是刚涉及FPGA到开发，特别希望前辈们能够共享一些关于图像处理方面的IP核-Some useful IP core, and I was just involved in FPGA to development, particularly the older generation to share some information about aspects of image processing IP core
bingchuan
- 自己编写的并串变换的fpga程序，使用verilog语言-I have written and strings Transform FPGA procedures, the use of Verilog language
tut_embedded_programming_verilog_C_DE2
- This tutorial explains how to communicate with IO devices on the DE2 Board and how to deal with interrupts using C and the Altera Monitor Program. Two example programs are given that diplay the state of the toggle switches on the red LEDs. The ᤙ
CON_AD
- 控制AD采样的程序,希望对大家能有所帮助!不对之处请多多指导!-I think it is a goog pragram ,I hope it is good for you !
oc_i2c_master
- I 2 C 是两线双向的串行接口，非常适合芯片级的通讯。由于 SOPC Builder并未提供 I 2 C 内核， 本节所描述的 I 2 C 内核是 Richard Herveille 制作的并发布到网上去的免费核。 关于 I 2 C 核的使用方法，请见光盘中 oc_i2c_master文件夹下的使用说明.txt。 -I 2 C is a 2-line bidirectional serial interface, very suitable for ch
I2Csimulatedfiles
- i square c - vhdl program for i square c
tdoa123
- Position location services will not only provide new customer options and products for wireless carriers, but will also provide features that could di erentiate services in di erent markets (i.e., di erentiation between PCS, cellular, and special
I2C
- I2C总线大全 I2C器件的操作 I2C总线C语言源程序 I～2C总线串行通信技术及其应用 I2C总线时序分析及其模拟 i2c总线协议(中文版)-Daquan I2C-bus I2C bus I2C device operation C language source code I ~ 2C bus serial communication technology and its applications Analysis and Simulation of I2C Bus T
Amateurcodekommentar.c
- Hello, i am 12 this is my first program
workspace0823
- 这是我写的基于xilinx公司的virtex5版本fpga的network底层程序，其中是C语言与API混合编程，希望对用得着的兄弟有些帮助。-This is what I wrote based company virtex5 xilinx fpga of the network version of the underlying process, which is a mixture of C programming language and API, the brothers want t
ofdmbaseband
- the OFDM PHY is adaptive therefore it supports multiple schemes BPSK, QPSK, 16-QAM and 64-QAM for data carriers’ modulation. The constellation diagrams are gray mapped and shows the magnitudes I and Q (In-phase and Quadrature) components of e
digital-clock
- 数字钟是计时仪器，它的功能大家都很熟悉。本实验对设计的电子钟要求为： 1．能够对s(秒)、min(分)和h(小时)进行计时，每日按24h计时制； 2．min和h位能够调整； 3．设计要求使用自顶向下的设计方法。 数字钟的功能实际上是对s信号计数。实验板上可提供2Hz的时钟，二分频后可产生s时钟。数字钟结构上可分为两个部分c计数器和显示器。计数器又可分为s计数器、min计数器和h计数器。s计数器和min计数器由6进制和10进制计数器构成，小时计数器较复杂，需要设计一个24(或12)
16-I2Creadwrite
- 采用EPM1278CPLD，通过verilog语言实现I² C接口的读写-By EPM1278CPLD, through the verilog language to read and write I ² C interface
fpgaconvert
- 将xilinx 的fpga配置bit文件转换为c语言文件，通过cpu配置fpga-translate？i can t
traffic-LED
- C语言交通灯源码，并且有原理图，希望大家喜欢。-C program traffic light source, and a schematic diagram, I hope everyone likes.
first
- 3-8译码器：输入变量为三个A,B,C，输出变量有8个，即Y0~Y7。 G1,G2A,G2B为选通输入，仅当G1=1, G2A=0, G2B=0时，译码器能够正确输出，否则，译码器输出无效，Y0~Y7均为高电平“11111111”。 -The 3-8 decoder: input variables for the three A, B, C, the output variables are eight, i.e. the Y0 ~~ Y7. G1, G2A, G2B strobe
decoder3_8
- -译码器输出是低电平有效。所以每一次只有一个低电平。 --KEY1键和KEY2键和KEY3键作为 A b C信号的输入。LED灯作为输出显示状态 --按键的默认状态是1 高电平 --当按键按下时 对应的I/O为低电平（0）， --为了得到不通的值，三个按键不按下时，都是111.表示7；三个按键都按下时,都是000.表示0-- The output of the decoder is active low. So every time only a low level.- KEY1 a