搜索资源列表
sccb
- 基于数字摄像头在初始化的时候的一种协议，包含时钟线和数据线。-Based on a protocol of the digital camera in the initialization time, including the clock and data lines.
VGA_CCD531
- 本文围绕一个包含Nios II软核处理器的可编程片上系统展开数码相机的样机设计。论文首先对样机所要达到的整体功能进行了规划，接下来并行开展了软硬件设计。在硬件方面，充分利用了所使用平台提供的SD卡插槽、键盘、数码管、SRAM等各种硬件资源，并用Verilog HDL硬件描述语言设计了样机系统所需要的VGA接口控制器、CMOS图像传感器接口控制器以及VGA显示存储器；在软件方面，本文基于Nios II软核处理器用C语言实现了SD卡的驱动、FAT文件系统的移植、VGA显视器的驱动以及BMP图片文件的
ov_control
- ov7620摄像头的同步控制程序，由vsync，href,pclk来控制图像行列及地址的输出-the ov7620 camera synchronization control procedures, vsync, href, pclk to control the image ranks and address of the output
XD-D01-20110108
- 压缩感知是近几年比较热门的话题，其中我研究的双像素相机就是基于DMD光调制系统和它-Compressed sensing is more popular in recent years, the topic, which I studied double pixel camera is based on the the DMD light-modulation system and
ov_control
- ov7620CMOS控制的verilog代码，用vsync.href,pclk共同控制摄像头同步。在signaltap以验证-The verilog code ov7620CMOS control jointly control the camera using vsync.href, pclk synchronization. In signaltap to verify
mux
- the code is for interfacing camera C3088 with avr microcontroller
camero_driver
- 驱动并初始化OV7670摄像头，并在FPGA上做初步的数据处理和存储，用Diamond2.0软件进行仿真和调试的配置-Driver and initialize OV7670 camera on FPGA preliminary data processing and storage, Diamond2.0 software simulation and debugging configuration
Nios_sram24
- 自己的毕设代码。实现用SDRAM运行nios，同时用SRAM保存摄像头数据。中间利用fifo可以保存两帧图像-Own the complete set up code. SDRAM running nios, SRAM save camera data. Intermediate use of fifo can save the image of the two
DE2_CCD
- 使用DE2开发板、CCD摄像头和VGA显示器，实时对人脸进行跟踪，可以随着人脸的前后移动，VGA显示不同的大小图案-The DE2 board CCD camera and a VGA monitor, real-time face tracking, can be mobile as the face of the front and rear, VGA display different patterns of size
MT9V011_Original_LCD
- 基于DE2板实现的011摄像头的驱动程序，并可实时显示到LCD-DE2 board to achieve the 011 camera driver, and can be displayed in real time to the LCD
DE2_115_CAMERA
- 实现DE2_115开发板上配套的500万像素cmos摄像头捕捉到的画面显示在VGA上-DE2_115 development board supporting 5,000,000 pixels cmos camera to capture the screen display in VGA
VHDLshipincaijixitong
- 利用ALTIUM DESIGNER设计一个CMOS摄像头采集系统，在这个系统中将把MIPS处理器、IIC控制器、AD视频接口、LCD控制器、SRAM控制嵌入到FPGA内部实现图 1的功能结构。-Use of the ALTIUM DESIGNER designed a CMOS camera acquisition system, the MIPS processor, IIC controllers, the AD video interface, LCD controller, SRAM
camera_fifo_ctrl
- camera异步接口中FIFO控制部分的源代码-FIFO control section of the source code in the asynchronous interface, camera
ccd_vga_de2
- 基于DE2板的VGA，CCD视频采集代码，可以手动调整曝光量，可以拍照和即时摄像-DE2 board VGA CCD video capture code, you can manually adjust the exposure, can take pictures and instant camera
pjt
- NIOS-II中PIO模拟的IIC驱动控制MT9M034摄像头-PIO simulated IIC driver control MT9M034 camera based on NIOS_II core
DE2_camera
- 通过摄像头采集图像显示到屏幕上，通过DE2开发板进行处理，基本实现显示功能。-Collected through the camera image is displayed on the screen by the DE2 board processing, the basic realization of display functions.
camera_test6
- 摄像头数据进行3*3表格的处理 然后进行中值滤波，8级流水线，速度快-Camera data for 3* 3 forms processing and then median filter, 8 lines, fast
cam_cap_fpga
- 包含上位机源代码，电路板的FPGA源码，实现摄像头的捕捉和采集-PC contains the source code, circuit board FPGA source code, achieving camera capture and collection
my_bayer2rgb
- 摄像头Bayer 转rgb信号 用verilog 编写 在xilinx fpga 软件下 ise 综合 编译-Bayer turn the camera rgb signal in xilinx fpga verilog prepared under ise integrated compiler software
blank
- 监控摄像头传入数据，通过芯片TVP5150转换成数字信号，其中sav_check.vhd检测帧头，converter.vhd将信号转换成Y，Cb，Cr格式，最后write_blank.vhd重新组建完整数字信号，最后通过ADV7171转成模拟信号输出到监视器上。这中间，可以对Y做各种图像处理，如滤波处理，均衡处理，只需要在converter之后添加处理文件即可。-Surveillance camera incoming data through the chip TVP5150 converte