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数字系统设计相关
- 这是有关VHDL的相关源代码，有简易CPU、加法器、除法器、计数器等-This is the relevance of the VHDL source code, a simple CPU, Adder, Divider, counters, etc.
good_CPU
- 本代码是在modelsim下运行的模拟8×8位的CPU，执行程度，对深入理解CPU设计和运行原理具有重要意义- This code is simulation 8脳8 position CPU which moves under modelsim, carries out the degree, to thoroughly understood the CPU design and the movement principle have the vital significance
cpuTerminate
- 用VHDL 编写的一个16位的cpu 设计方案，可以执行8条指令。-use VHDL to prepare a 16 cpu design of the program, the implementation of eight instructions.
KPCSMII
- Xillinx 的8位MCU软核的源代码，可在VertexII上运行，对CPU设计人员有很大参考意义-Xillinx the eight MCU soft-core source code can be run in VertexII. CPU designers to have great reference value
the-strong-cpu-design
- 增强型CPU设计，带有PC指针与存储器，用VHDL语言写的，不含流水线设计，实现二进制灯循环亮-Enhanced CPU design, with the PC pointer memory write VHDL language, non-pipelined design to achieve binary bright light cycle
RISC-CPU-design
- 16位RISC-CPU设计，高四位为操作码，低12位为地址，寻址空间位4KB。包含12条指令（预设16条指令），3个基本测试文件及其Modelsim仿真结果。-16-bit RISC-CPU design, the high four bits for the opcode, the lower 12 address, the address space of 4KB. Consists of 12 instructions (default 16 instructions), the thre
CPU
- 哈尔滨工业大学，计算机专业，计算机设计与实践课程，CPU设计-Harbin Institute of Technology, computer professional, computer design and practical courses, CPU design
cpu-risc
- wb_switch，cpu设计，精简指令cup设计-wb_switch，opencore，risc cpu design。
CPU
- 东南大学VHDL课程CPU设计 Verilog语言-Southeast University, CPU design Verilog language VHDL course
cpu
- 8位实验CPU设计利用设计好的指令系统，编写汇编代码，以便测试所有设计的指令及指令涉及的相关功能。设计好测试用的汇编代码后，然后利用Quartus II软件附带的DebugController,编写汇编编译规则。接着，利用DebugController软件把汇编编译之后的二进制代码置入到所采用的存储器中，并对设计好的8位CPU进行测试。-Eight experiments designed CPU design using the instruction set, write assembly
CPU
- 4位精简指令集的cpu设计，是数字电路与逻辑的课程设计，对于学习微处理器和数字电路的同学还是很有帮助的-4 RISC cpu design, digital circuit and logic of curriculum design, microprocessors and digital circuits for learning or helpful for students
single-CPU
- 单时钟CPU设计，spartan 3e板上试验通过，支持部分mips指令，内含示例mips代码及二进制文件-Single CPU clock design, spartan 3e board test passed, support some mips instruction, containing sample code and binary files mips
CPU
- 简易CPU设计 利用VHDL编写。包含一个可以用于检验的LPM-RAM-DQ-CPU-design VHDL
cpu-design
- 采用VHDL实现的CPU设计代码，工程中包含测试波形。包含CPU设计文档，如指令格式设计和各功能模块说明和指令测试序列，能下载到实验台上直接运行。-CPU design is realized by VHDL Language, the project contains the test waveform. Contains the CPU design documents, such as directives format, instructions for each function mo
cpu
- 基于VHDL的简易CPU设计，可以实现加、减、乘三种运算，模拟CPU的运算过程通过指令实现运算-Simple CPU design based on VHDL, three operation can realize add, subtract, multiply, simulation of the CPU operation process operation was achieved by instruction
8bit-cpu
- VHDL由简单存储器，计数器等搭建最终实现8位的cpu设计-VHDL realization 8 of cpu design
CPU
- 单周期的CPU设计，实现了12条指令,适合正在学习CPU的初学者-the design of signal CPU and achieve 12 instructions.
mips-cpu-master
- CPU设计，已通过模拟，有需要的自行下载吧(CPU design has been simulated)
单周期CPU实验报告
- 单周期CPU的设计思路(包含数据通路、指令集、信号的设计)(Design Ideas of Single Cycle CPU)
2017级计算机组成原理课程设计任务1--CPU设计实验
- 学习计算机组成原理的必备利器 用实际操作来亲身感受计算机的内部工作原理(A necessary tool for learning the principle of computer composition Experience the inner workings of a computer with actual operation)