搜索资源列表
USB2_0CY7C68013FPGAVerilogHD
- cy68013与fpga接口的veriloghdl设计
PDC-9022-A
- cy68013 vhdl code and usb high speed
ads7825
- use this source code for interface to adc ads7825
cy68013withFPGA
- 经过验证的代码，关于cy68013 与FPGA进通信作，可以直接综合使用-After verification code into the FPGA on cy68013 and communications for, can be directly integrated use of
spart6_usb_rw_example
- 这是USB芯片CY68013和FPGA互连的读写的实例代码，sparten6是新的FPGA平台，对需要使用新的平台的朋友，有一定的帮助。-This is the USB chip and the FPGA interconnect CY68013 read the example code, sparten6 a new FPGA platform, the platform on the need to use the new friends, have some help.
USBDataAcquire_Instance
- 在CY68013的FIFO模式下实现FPGA从USB中获取数据-In CY68013 the FIFO mode the FPGA to get data from the USB
68013-FIfo
- cy68013开发资料，上位机、固件和FPGA读写，如有什么问题可以QQ我，共同探讨，QQ:29077181-CY68013 code
fpga-usb-verilog-test
- 红色飓风开发板中USB测试源码部分，包含说明文档，FPGA的verilog代码，cy68013固件程序，上位机测试程序。实现USB回环测试，可作为usb开发的参考文件-Red hurricane development board of the USB test source code, including documentation, FPGA verilog code, cy68013 firmware program, PC test program. Realization of USB
sramf
- 简单的verilog程序，完成sram读写，CY68013开发板的原理图和PCB档。(array to simulate SRAM wire [(dqbits - 1) : 0] memprobe = {bank1[A], bank0[A]};)
fifo_FPGA
- 68013 FIFO 接口程序，USB开发、VHDL开发(68013 FIFO USB VHDL FPGA)
VERILOG_USB2.0源代码
- 基于verilog针对CY68013开发的USB通信程序(USB communication program based on Verilog for CY68013 development)