搜索资源列表
crc3321
- CRC循环校验码的VERILOG源文件，在MODELSIM下的一个工程。-Cyclic Check Code VERILOG source, the MODELSIM of a project.
CRC-Verilog
- 此是进行循环冗余效验的Verilog编码，适合多种标准，如CRC16-this Cyclic Redundancy is well-tested Verilog code for a variety of criteria, such as CYXLIC REDUNDANCY
decode.rar
- 基于VHDL语言的循环码编码器的程序，以一个（15，6）循环码为例,VHDL language based on the cycle of the program code encoder to a (15,6) cyclic code as an example
sim.rar
- 通用的循环码编码器和（7,4）循环码译码器。采用VERILOG HDL编写，通过硬件验证。需使用modelsim 5.6仿真,Common cyclic code encoder and (7,4) cyclic code decoder. VERILOG HDL preparation used by the hardware verification. Need to use simulation modelsim 5.6
parity_and_CRC
- 奇偶校验和循环冗余检测的Verilog代码，很好，和大家一起学习-Parity and cyclic redundancy detection of Verilog code, very good, and we will study together
bianma
- 基于VHDL设计的在quarters2上的循环码编码器-VHDL-based design at quarters2 on the cyclic code encoder
vhdl
- 循环码编译码程序，用c语言编程的 该for 循环计算码组的后3 个码元-Cyclic code encoding and decoding procedures, with c language programming cycle of the calculation of the code group for the three yards after the yuan
crc32
- crc循环冗余校验码，用于对传输信号进行编码校验，是信息更可靠-crc cyclic redundancy check code used to transmit coded signals to verify, the information is more reliable
crc_xilinx
- Cyclic Redundancy Check (CRC) is an error-checking code that is widely used in data communication systems and other serial data transmission systems.-Cyclic Redundancy Check (CRC) is an error-checking code that is widely used in data communication
crc_16
- 16位的CRC(循环冗余校验码)，CRC是数据通信领域中最常用的一种差错校验码，其特征是信息字段和校验字段的长度可以任意选定。-16-bit CRC (cyclic redundancy check code), CRC is the data communications of the most commonly used error checking code, which is characterized by the information field and check the len
CRC
- Cyclic redundancy check code (16-bit) Very good code verified code
12CRC
- CRC码是一种循环码，有着极强的检错能力，在计算机通信和移动通信种广为应用。-CRC code is a cyclic code, there is a strong error detection capability in the computer and mobile communications are widely used species.
crc
- 本代码是CRC循环冗余校验实例，包含顶层原理图文件，十分直观-The CRC is cyclic redundancy check code examples, including the top-level schematic file, very intuitive
CyclicCode
- The Decoder of differential cyclic code using in the broadcasting receiver.
BCH
- BCH 是纠错能力可控的纠错编码，是循环码的子类． 介绍了BCH 码的编码原理和设计方法，在特定信道和调制方式下对经过BCH 编码的系统进行仿真，分析BCH 码在特定信道下的编码增益.-BCH is error correction ability of controllable error correction coding, is a subclass of cyclic code. Introduces BCH code coding principle and design method
exp4
- 基于fpga的（7,4）循环码编码电路。vhdl代码-（7,4) cyclic code encoding based on fpga
cyclecoder_decoder
- (7,4)循环码的verilog编码程序，（7，4）循环码的verilog译码程序-(7,4) cyclic code Verilog coding procedures, (7,4) cyclic code the verilog decoding procedure
shifter
- 用vhdl语言采用时序电路(移位寄存器)的方式实现（7，4）循环码编码器-Vhdl language used by the timing circuit (shift register) way to achieve (7,4) cyclic code encoder
循环码
- 这是对于循环码编码器的语言，希望对大家有帮助(This is the source code for cyclic code coding, I hope to help everyone)