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vhdl程序例子
- vhdl程序源代码，包括Combinational Logic Counters Shift Registers Memory State Machines Registers Systems ADC and DAC Arithmetic等-VHDL source code, including Combinational Logic Counters Shift Registers State Machines Registers Memory S
dac
- DAC converter design with Verilog code and testbench
tlv5620芯片的Verilog语言DAC转换代码
- tlv5620芯片的Verilog语言DAC转换代码,tlv5620 chip Verilog language DAC conversion code
ad5399
- AD5399是一款串行输入、双通道、12位数模转换器，可采用二进制补码数字编码。。 用Verilog实现其配置与功能-AD5399 is a serial input, dual-channel, 12-bit DAC, digital code can be twos complement. . Configuration and use Verilog functions to achieve its
dac
- Digital to Analog Converter code VHDL
TLC5620
- Verilog HDL语言，FPGA实现TLC5620的DAC源代码-Verilog HDL language, FPGA implementation of the DAC TLC5620 source code
ADC
- a verilog code about dac of audio codec on fpga board.
DAC
- a verilog code about dac of audio codec on fpga board.
SG_FPGA
- 2006年电子设计竞赛二等奖，多功能函数、信号发生器核心器件FPGA内部的原理图，主要模块用VHDL代码描述，包括PLL、相位累加器、波形算法和正弦波查找表，可实现0.005Hz~20MHz的多波形信号产生，频率步进值0.005，输出接100MSPS速率的DAC--AD9762-Electronic Design Competition 2006, second prize, multi-function signal generator within the core of the devic
61EDA_H174
- 基于FPGA的TLV5620芯片的Verilog语言DAC转换代码-FPGA-based chip TLV5620 DAC conversion code Verilog language
Practica-9
- DAC code to generate triangular signal fpga
DAC-use-verilog
- 用verilog写的TLV5620芯片的DAC转换代码，核心文件dac.v，能进行实现，不仅仅是行为级描述-Written with verilog conversion code TLV5620 DAC chip, the core file dac.v, can be achieved, not just behavioral descr iption
New-Text-Document
- I give one code for ADC _ DAC on spartan 3E Hope it can useful for you!
xapp876
- JESD接口在FPGA中的实现，可以实现与高速ADC及DAC接口对接。-Source code of xapp876.
DACtest
- Spartan 3E - DAC- VHDL. It is a vhdl code for Xilinx Spartan 3E fpga to run ADC and AMP on the board via SPI interface.
16-bit-A-DCa16-bit-DAC-VHDL
- 16-bit Analogue to Digital Converter&16-bit Digital to Analogue Converter VHDL source code.在modelsim下仿真通过-16-bit Analogue to Digital Converter & 16-bit Digital to Analogue Converter VHDL source code. Simulated in modelsim
ADC_DAC
- Altera公司CycloneII系列FPGA控制ADC/DAC的代码-Altera CycloneII FPGA control CycloneII Series ADC/DAC code
SPI-Master-Core-DAC-ADC-spartan
- SPI Master Core for spartan (ADC, DAC) vhdl code
DAC
- 这是一段基于FPGA的dac转换代码。欢迎大家下载测试使用。(This is a section of FPGA based DAC conversion code. Welcome to download, test, use.)
DACAD9708
- DAC_AD9708的verilog hdl 代码，简单易懂，AD9708为top文件，需要自己配置只读存储器，输出正弦波。(DAC_AD9708 verilog HDL code, AD9708 for top file, need to configure read only memory, output sine wave.)