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ClkScan
- 此设计采用Verilog HDL硬件语言设计,在掌宇开发板上实现. 将整个电路分为两个子模块，一个提供同步信号（H_SYNC和V_SYNC）及像素位置信息；另一个接收像素位置信息，并输出颜色信号。这样便于进行图形修改，同时也容易实现- This design uses Verilog the HDL hardware language design, realizes on the palm space development board Divides into two stature
qdq_new
- 采用Verilog HDL设计,在掌宇智能开发板上得到实现 根据抢答器的原理，整个电路可划分为三部分：采样电路、门控电路和译码电路- Uses Verilog the HDL design, obtains the realization basis on the palm space intelligence development board to snatch the answering principle, the entire electric circuit may divi
Music_altera
- 采用Verilog HDL设计，在Altera EP1S10S780C6开发板上实现 选取6MHz为基准频率，演奏的是梁祝乐曲 - Uses Verilog the HDL design, development board realizes in Altera on the EP1S10S780C6 selects 6MHz is the datum frequency, the performance is Liang wishes the music
基于FPGA的李沙育图形发生器
- 这是一个用MAX+PLUSII开发FPGA（1K30器件）开发的李沙育图形发生器（硬件描述语言部分）。-This is a development with MAX PLUSII FPGA (1K30 device) developed Lissajous Pattern Generator (hardware descr iption language).
一个VHDL实现的测频计
- 一个vhdl实现的测频计,开发环境为任何支持vhdl语言的厂商提供的开发环境 -VHDL achieve a frequency measurement of dollars, development environment for any VHDL language support for manufacturers of the development environment
ref-sdr-sdram-verilog
- 本代码是用VRILOG语言写的SDRAM的控制器的标准代码,供开发SARM参考.-this code is used to write the language VRILOG SDRAM controller standard code for the development of SARM reference.
路口交通灯
- 个人硬件课程设计，简单实现了FPGA平台的路口交通灯管理，开发环境为MAX+plus-individual hardware curriculum design, a simple realization FPGA platform junction traffic lights management, development environment for MAX plus
FPGA-development-board
- FPGA开发板硬件设计方案 我选择的另一款开发板 所选芯片为Altera stratixII EP2S180F-1020 对接口 和板上布局有详细介绍-FPGA development board hardware design scheme Altera stratixII EP2S180F-1020
FPGA-Development-Raiders-Innovative
- FPGA开发全攻略— 工程师创新设计宝典 上册 基础篇 2009年2月 1.0版-FPGA Development Raiders- Innovative Design Engineers Book Collection on the basis of articles in February 2009 Version 1.0
FPGA-Development-Raiders-engineer-next
- FPGA开发全攻略— 工程师创新设计宝典 下册 技巧篇 2009年2月 1.0版-FPGA Development Raiders- engineer innovative design skills of the next volume of Collection papers in February 2009 Version 1.0
SOPC-development-of-the-Chinese-version-of-Quick-S
- SOPC开发快速入门教程中文版 对SOPC感兴趣的可以参考学习-SOPC development of the Chinese version of the Quick Start Guide can refer interested in learning SOPC
Xilinx-EDK-tool-development
- 基於Xilinx EDK的嵌入式系統研發-Xilinx EDK development
SOPC-development-of-Chinese
- SOPC development of Chinese version of the Quick Start Tutorial
system-design-and-development
- FPGA数字电子系统设计与开发 书中例子-code from book FPGA digital electronic system design and development
FPGA-development
- fpga 开发全攻略， 初学者， 了解fpga ， 开发环境-fpga development manual。 starter，verilog
ISE-Development-of-advanced
- Xilinx公司ISE开发环境的开发进阶，对于更高层次的FPGA开发者有很好的帮助。-Xilinx s ISE development environment, the development of advanced, have a good help for the higher-level FPGA developers.
Development-QuanGongLve1
- FPGA 开发全攻略（上） 学习FPGA的好资料-FPGA development QuanGongLve ， the good learning FPGA information
Development-QuanGongLve2
- FPGA 开发全攻略（下） 学习FPGA的好资料-FPGA development QuanGongLve， the good learning FPGA information
FPGA-development--and-VHDL--based
- FPGA开发流程简介与Verilog HDL语言基础-FPGA development process and VHDL language based
FPGA-development-Raiders
- 这本书是电子工程师创新设计必备宝典系列之FPGA开发全攻略。-This book is the the electronic engineer innovative design necessary Collection Series FPGA development Raiders.