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TestLED2C5
- 文件中有CPU8051V1.vqm具体使用的例子和CPU8051V1.vqm文件，适用于quartusii软件中对单片机的嵌入练习和使用-CPU8051V1.vqm document specific examples of the use of CPU8051V1.vqm documents, quartusii software for single-chip embedded in the exercises and the use of
fsm
- VHDL新手入门：有限状态机练习（三段式结构）-VHDL Getting Started: Finite state machine exercises (three-stage structure)
paoma
- 用FPGA实现的跑马灯设计，各种闪烁样式，适合于初学者练习-FPGA designs implemented with the Marquee, all kinds of flashing style, suitable for beginners exercises
verilog
- 一组练习，关于VHDL的一些基础的知识和练习可以参考一些具体的问题-A group of exercises, on a number of VHDL-based knowledge and practice can refer to some specific questions
Verilog
- 这是verilog的练习题，希望帮助学习erilog的同学已经学者-This is a Verilog the exercises, in order to help students learn erilog have scholars
Verilog_HDL_language_learning
- Verilog HDL语言练习与讲解 里面有很多实用的源代码-Verilog HDL language exercises on the inside and have a lot of useful source code
VerilogHDL_IC
- VerilogHDL_IC设计核心技术实例详解，部分习题源码，-Examples of core technology VerilogHDL_IC detailed design, and some exercises source,
AVerilogHDLTestBenchPrimer
- VHDL的验证练习题，对于新手是很好的练习机会-VHDL validation exercises for the novice is a good practice opportunity
Altare
- altera 公司训练新人的经典练习题，对初学者很有帮助。-altera' s classical training, new exercises, helpful for the beginner.
contrato
- VHDL multiple exercises
div
- 近期的一些VHDL语言练习实例，包括一些简单的逻辑电路设计，运行大部分成功，可能还有一些小问题，希望各位同仁指点改正。-Some recent examples of VHDL language exercises, including some simple logic circuit design, running most of the successful, there may be some small problems, hope that colleagues pointing c
VHDL_statemachine
- MOORE 和MEALY模型的状态机，用VHDL语言描述，本章讲述状态机实现的原理以及方法，希望对大家有用，同时有练习题和思考题-MOORE and MEALY model state machine, using VHDL language descr iption of the state machine implementation of this chapter describes the principle and method, we want to be useful, while
fskcodec
- fskcode 和fskdec，需要这方面的可以下载做练习-fskcode and fskdec, need this to do the exercises can be downloaded
Verilog
- Verilog语言练习与讲解中文版.pdf-Verilog language exercises and explain the Chinese version. Pdf
VerilogHDLexcisize
- velilog学习用的一些练习题目，用于测试当前的学习-velilog learn some exercises with topics of study for testing current
plpp_answers
- Programming Languages - Principles and Practice 2nd Edition by Kenneth C. Louden Thomson Brooks/Cole 2002 Answers to Selected Exercises
test
- 文思公司的测试习题，想进入文思公司当测试工程师的，可以拿来看看。-Evans' s test exercises, the company wanted to enter Evans when the test engineer can be used to see.
VHDLdesignexamples
- 半整数分频器、音乐发生器、信号产生器、多功能电子表、交通控制灯、数字频率计的设计实例及习题-Half-integer divider, music generator, signal generator, multi-function digital watch, traffic control lights, digital frequency meter design examples and exercises
bijiaoqidesheji
- 1. 掌握比较器的逻辑功能和工作原理； 2. 进一步熟悉 ISE 的工作环境及操作，练习用VHDL 语言编写比较器程序。-1 master comparator logic functions and working principle 2 more familiar with the ISE work environment and operations, exercises using VHDL language comparator procedures.
DE1-lab
- solution of lab 1 to lab 8 in DE1 lab exercises.