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chengxufengxiang
- 这些程序我用MAX+PlusII软件测试均能通过编译，程序本身不复杂，旨在为刚接触VHDL语言的朋友提供一些样例，以便了解VHDL语言的基本构成。如果要运行测试，则新建文件名应于程序中实体名一致，文件后缀“.vhd”，不推荐直接通过复制、粘贴的方法录入程序，可能会引入错误字符。 -these procedures I used MAX PlusII Software Testing pass compiler, the process itself is not complicated. for
verilog-a-lrm-1-0
- Verilog-A Language Reference Manual Analog Extensions to Verilog HDL
jiaotongdeng
- 网上虽然有很多交通灯的参考程序,但又么不是很低级,又么没多少扩展功能,这是我写的交通灯程序,绝对超经典!-Although there are many traffic lights online reference program, but Why is not very low, then Why did not the number of extensions, this is the traffic light program I wrote, absolutely super clas
cc
- 在完成2选1数据选择器之后，将信号x和y的位宽由1位扩展为8位-Upon completion of the data selector 2 S 1 after the signal x and y of the bit width from 1 to 8-bit extensions
PXI_Module_Description
- PXI Module Descr iptionFile Specification PCI eXtensions for Instrumentation An Implementation of PXI Module Descr iption File Specification Rev. 1.0 9/25/2003 PXI-4 Revision 1.0
mysopc
- 基于友晶DE0开发板做的NiosII最小系统，主要是修正了开发板上闪存连线错误，已经测试过，烧到DE0里面就直接可以跑了。SDRAM和FLASH存储器都可以正常运行，里面还有一个用于点亮LED的小程序，是用软核实现的，从而证明该最小系统可以正常运行，其余的扩展可以自行开发-Friends of grain-based development board to do NiosII DE0 minimum system, mainly Fixed connection error on the de
Micro-SD
- 数字模组将各种扩展功能以统一的总线方式引出，再通过原系统的控制板，连接相应的外设接口，以实现对应的功能；-Digital module will be a variety of extensions to the unified bus lead, then through the system control panel, connecting the corresponding peripheral interface, in order to realize the correspondi
verilog-hdl
- 本设计是以四路抢答为基本概念。从实际应用出发,利用电子设计自动化( EDA)技术,用可编程逻辑器件设计具有扩充功能的抢答器。它以Verilog HDL硬件描述语言作为平台，结合动手实验而完成的-The design is based on four basic concepts answer. From the practical application, the use of electronic design automation (EDA) technology, using a prog
ext
- 32位数据扩展，可以将16位的数据扩展为32位，分为算数扩展和逻辑扩展。-32 data extensions that can be extended to 16-bit data 32, into extended arithmetic and logical extension.