搜索资源列表
FIR
- Quartus II中滤波器的设计，里面含有高通滤波器，低通滤波器，带阻滤波器，主要用于滤除心电信号中的干扰-Quartus II filter design, which contains a high-pass filter, low-pass filter, band stop filter, mainly used for filtering of ECG signal interference
48_order-FIR-filter-with-8-folder
- 该代码是设计一个48阶FIR滤波器的文档，该设计方案主要运用了数字信号处理VLSI实现中的折叠的方式。-The code is a 48-order FIR filter design document, the main use of the design of VLSI implementation of digital signal processing in the way of folding.
16_FIR
- 16阶FIR滤波器--本设计用VERILOG HDL语言串行DA算法实现16阶有限频率响应滤波器！-16-order FIR filter- this design language VERILOG HDL serial DA algorithm limited frequency response of 16-order filter!
DA_fir
- 基于分布式算法的FIR滤波器设计及FPGA实现-Distributed algorithm based on FIR filter design and FPGA realization of
FIR
- 基于FPGA的FIR滤波器设计思想，里面有很好的算法供大家参考-FPGA-based FIR filter design ideas, there are very good for your reference algorithm
vhdl
- FIR滤波器的性能参数 设计一个滤波器最基本的就是性能参数的,决定着滤波器的实际功能.比如阶数,截至频率。 本文滤波器设计参数 ①输入,输出数据宽度10位 ②阶数为4阶的线性相位FIR滤波器， ③类型:带通 -FIR filter performance parameters The design of a filter is the most basic performance parameters, determines the actual filter fu
65jie
- 串并FIR滤波器设计:并行FIR滤波器具有速度快、容易设计的特点，但是要占用大量的资源。在多阶数的亚高频系统设计中，使用并行结构并不合算，但亚高频系统需要较高的处理速度，而串行架构往往达不到要求，因此，结合串并这两种设计方法的长处，在使用较少的硬件资源的同时实现了较高的处理速度，这里说明一种65阶八路并行、支路串行FIR滤波器的设计（实际使用了1个乘法器，8个乘累加器，一个累加器）。-String and FIR filter design: parallel FIR filter with a
FIR_filters_Xilinx
- FIR filter design method using Xilinx FPGA platform.
FIR
- fir filter design using vhdl codes
fir-c2h
- 基于fpga的fir滤波器的设计 非常好，谢谢大家分享-fir filter design base on fpga it is very good
fir
- 数字电路设计中的，fir滤波器设计，我做的是8位宽的，利用vhdl实现，附带了完整的代码，报告，我没有对我的信息进行删除，是希望大家能够诚实的利用这个代码，提高自身本领。-Digital circuit design, fir filter design, I am doing is 8 bits wide, using vhdl implementation, with a complete code, the report, I did not delete my information i
FIR-filter-using-fpga-design
- 基于FPGA的高阶FIR滤波器设计4有matlab设计步骤 4.3更详细 第六章量化系数实例-FIR using FPGA ，QuartusII software
fir-filter-design-using-fpga-with-MAX-Plus2
- 基于FPGA的高阶FIR滤波器设计用max-plus －II软件仿真-fir filter using fpga with max-plusII
FIR
- 实现FIR滤波，利用Verilog语言对其进行了设计 -FIR filter implementation using Verilog language design was carried out
fir
- 真正意思上的fir滤波器课程设计，基于quartus II9.0的vhdl代码。有原理图输入和例化元件-The real meaning of the fir filter design program, based on quartus II9.0 the vhdl code. A schematic of components and cases
FIR-lv-bo-code
- 此代码为FIR滤波器的设计源码，并对其代码做了相应的改进，综合仿真结果成功-This code source code for the FIR filter design, and the code does a corresponding improvement, integrated simulation results successfully
DA-FIR
- 采用DA算法实现FIR滤波器的设计实验原理建模仿真-DA algorithm using FIR filter design principles of modeling and simulation experiments
fir-filter-design-and-implementation
- 简单正确的fir滤波器设计与实现，帮助我们更好的设计更复杂的滤波器-Simple and correct fir filter design and implementation, to help us better design more complex filter
fir filter vhdl code
- FIR filter design using Matlab Coefficient file and RTL design for FIR filter Design
fir filter design
- FIR FILTER DESIGN IN VERILOG ON FPGA