搜索资源列表
MPDU_ASSEMBLER
- G.hnMAC层功能代码,实现了MPDU的资源调度-G.gn MAC codeG.gn MAC codeG.gn MAC code
YUV2RGB
- 该代码可将YUV图像数据转换为VGA显示器能显示的RGB数据,R,G,B的位宽均为4,转换速度快。-The code can be converted to a YUV image data of RGB VGA monitor can display the data, R, G, B of the bit width of 4, the conversion speed.
Hamming_Encoder
- (7,4)Hammming码编码器,verilog代码实现。生成矩阵为G=[1,0,0,0 0,1,0,0 0,0,1,0 0,0,0,1 1,1,1,0 0,1,1,1 1,1,0,1]-(7,4) Hammming Encoder, verilog code. Generator matrix is G = [1,0,0,0 0,1,0,0 0,0,1,0 0,0,0,1 1,1,1,0 0,1, 1,1 1,1,0,1]
fifo
- 是在quartus II软件的中编写的fifo模块的verilog HDL硬件描述语言代码,提供给大家希望对大家有一定的而帮助。-fjwe fe w w4 twtw43t4 t3fsjs fsd f swefw gewr ge ger g e t 3ewutowj otweu to teow t3o tewr to t3t t3e rtweo t3w 34 t34 o3tjwkl sj ter k.
SRIO-phy-code
- SRIO接口物理层的实现代码,非常复杂,完全自己用verilog编写,支持5G速率,可以作为开发参考-SRIO interface implementation code, the physical is very complex, completely written in verilog, support rate of 5 g, will be helpful to the development
IIC_Verilog
- I2C接口代码,v e r i l o g(The code of I2C interface, verilog HDL)
基于FPGA自治混沌网络量化真随机数代码
- 基于FPGA自治布尔混沌网络,量化真随机数。可通过例化多组网络,产生高带宽真随机数,根据FPGA性能,自重随机数带宽达数G.