搜索资源列表
-
0下载：
高通滤波器的verilog实现，对初学者设计FIR有好处，分布式算法-Verilog implementation of high-pass filter, FIR design is good for beginners, distributed algorithm
-
-
3下载：
基于FPGA的自适应滤波器的实现。采用Verilog编程，2阶滤波器。-FPGA-based realization of the adaptive filter. Using Verilog programming, 2-order filter.
-
-
1下载：
该代码是设计一个48阶FIR滤波器的文档，该设计方案主要运用了数字信号处理VLSI实现中的折叠的方式。-The code is a 48-order FIR filter design document, the main use of the design of VLSI implementation of digital signal processing in the way of folding.
-
-
0下载：
基于FPGA的FIR数字滤波器的设计与实现,基于FPGA的FIR数字滤波器的设计与实现-FPGA-based FIR digital filter design and implementation of FPGA-Based FIR Digital Filter Design and Implementation
-
-
0下载：
利用verilog语言设计实现8路FIR滤波-Using verilog Language Design and Implementation of 8-channel FIR filter
-
-
0下载：
17阶的简易低通滤波（FIR），用quartusII 实现（含实验报告）-17 Order of the simple low-pass filter (FIR), with quartusII implementation (including test report)
-
-
0下载：
实现FIR滤波，利用Verilog语言对其进行了设计
-FIR filter implementation using Verilog language design was carried out
-
-
0下载：
一种基于FPGA的高效FIR滤波器的设计与实现 -An efficient FIR filter based on FPGA of design and implementation
-
-
0下载：
it is the collection of the modules involved inthe design of digital fm.the code coves the key components like numerically controlled oscillator, loop filter, fir filter ,phase detector along with the complete cicuit implementation of the digital fm
-
-
0下载：
ABSTRACT:
Low power consumption and smaller area are some of the most important criteria for the
fabrication of DSP systems and high performance systems. Optimizing the speed and
area of the multiplier is a major design issue. However, area and
-
-
0下载：
基于FPGA的自适应FIR滤波器的verilog设计与实现-Adaptive FIR Filter Based FPGA Design and Implementation of verilog
-
-
0下载：
system generator 实现FIR滤波器，使用DA分布式算法-Implementation of FIR filter with DA, using system generator
-
-
0下载：
在ｑｕａｒｔｕｓ ＩＩ下的项目例程，完整实现了一个ＦＩＲ滤波器的设计。-Routine of the project in quartus II, a complete implementation of an FIR filter design.
-
-
0下载：
基于FPGA的32阶FIR滤波器设计，研究了一种采用FPGA实现数字滤波器硬件电路方案；讨论了窗函数的选择、滤波器的结构以及系数量化问题-32 order FIR filter design based on FPGA, an FPGA implementation digital filter hardware circuit program discussed the choice of the window function, the structure of the filter co
-
-
0下载：
一个工作频率（采样频率）100M的，截止频率10M的FIR滤波器，一共是108阶。
一共四个文件，滤波器的实现文件FILTER.v，测试平台FILTER_TB，matlab生成测试向量，和matlab读取输出数据分析。
经过了测试，是可用的-A working frequency (sampling frequency) 100M, cutoff frequency 10M FIR filter, a total of 108 bands. A total of four documen
-
-
0下载：
采用VHDL语言编写的fir级联结构的LMS自适应滤波器，方便学习研究自适应滤波器有关参数实际实现的影响-Using VHDL language fir cascade structure of LMS adaptive filter, adaptive filter to facilitate study and research the impact of the actual implementation of the relevant parameters
-
-
0下载：
FIR滤波在数字信号领域中很大作用。这个源码很大帮助VHDL工程师或学习者。里面包含说明书。-This report investigates the power consumption of digital arithmetic circuits for use in the design and implementation of a 15-tap programmable Finite Impulse Response (FIR) filter.
-
-
0下载：
基于verilog的 FIR低通滤波器的实现(Implementation of FIR low pass filter based on Verilog)
-
-
0下载：
用FPGA开发板实现FIR滤波器，C2000 DSP教学实验箱(Implementation of FIR filter with FPGA development board)
-
-
0下载：
fir滤波器的简单实现，主要用于学习与理解(Simple implementation of the fir filter, mainly for learning and understanding)
-
