种用FPGA 实现对高速A/ D 转换芯片的控制电路,系统以MAX125 为例,详细介绍了含有FIFO 存储器的A/ D 采样控制电路的设计方法,并给出了A/D 采样控制电路的V HDL 源程序和整个采样存储的顶层电路原理图.-Species with FPGA to achieve high-speed A/D conversion chip control circuit, the system as an example to MAX125 details FIFO memory cont

该程序是用vhdl控制max125进行ad转换的程序，已经在本人的板上调试通过。对于用vhdl编写ad转换程序有一定的参考价值。-The program is vhdl control max125 for ad conversion process, has been through in my board debug. Ad for the preparation of the conversion process using vhdl some reference value.