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VHDL多功能时钟设计
- VHDL多功能时钟设计~~24小时制~带闹钟,VHDL design of multi-functional clock ~ ~ ~ 24 hours with alarm system
FPGA实现多功能闹钟
- FPGA实现多功能闹钟，有电子钟、秒表、定时器、电子琴功能-FPGA realization of multi-function alarm clock, which can function as a clock, a stopwatch, a timer,and a piano.
SHUZIZHONGVHDL
- 多功能数字钟的VHDL编程实现，有与其他数字钟不同的秒表，闹钟等更多功能-Multi-function digital clock of VHDL programming, digital clock with other different stopwatch, alarm clock function, such as more
vhd_design
- 我学习VHDL的课程设计，是多功能数字钟，有闹钟，秒表等功能，多指教-I learned VHDL course design is multi-functional digital clock, there is an alarm clock, stopwatch functions, multi-Zhi Jiao
clock
- 采用Verilog HDL语言编写的多功能数字钟，包括四个功能：时间显示与设置、秒表、闹钟、日期显示与设置.-Using Verilog HDL language multi-functional digital clock, including the four functions: time display and settings, stopwatch, alarm clock, date display and settings.
Multi-functionDigitalClock
- 可实现校时，仿电台报时，闹钟，报整点时数-The school can be realized when the fake radio timekeeping, alarm clock, reported that the number of hours the whole point of
clock
- 多功能数字钟Verilog HDL的源码，能够整点报时，报整点数，设定任意时刻闹钟，低音高音两种频率。-Multi-function digital clock Verilog HDL source code, set the alarm clock at any time, bass treble two frequencies. It s for FPGA.
timer
- 这是一个基于FPGA设计的24时多功能数字钟，具有正常星期、时、分、秒计时，动态显示，保持、清零、快速校分、整点报时、闹钟功能。-This is an FPGA-based design of multi-function digital clock 24 hours, with a normal week, hours, minutes, seconds, timing, dynamic display, maintaining, resetting, fast school hours, t
clock
- 实现多功能电子表，含有闹铃，时间精确到毫秒-Achieve multi-functional electronic watch, with alarm, time, milliseconds
electricwatch
- 用VHDL语言设计多功能的电子表。实现基本电子表的时间显示、闹钟、秒表等功能-VHDL language design with multi-functional electronic watch. The time table to achieve basic electronic display, alarm clock, stopwatch functions
watch
- 本文件为电子设计而开发的多功能数字钟VHDL语言完整源代码 --该数字钟实现的功能有时间，秒表，闹钟，年月日的显示设置等 -This document is multi-functional electronic design and development of a complete VHDL, digital clock source code- the digital clock function can be achieved time, stopwatch, alarm clo
clock
- 该程序是用嵌入式开发的一个多功能数字钟，可以实现正常的计时，倒计时，闹钟，始终调整，整点报时功能-The program is the development of a multi-function embedded digital clock, can achieve a normal time, countdown, alarm clock, and always adjusting, the whole point timekeeping function
clock
- 用VHDL实现多功能数字钟 闹铃 计时 动显 报时等-VHDL realization of multi-functional digital clock with alarm timer was timekeeping and other fixed
shizizhong
- 利用QuartusII7.0、MATLAB以及SmartSOPC实验系统进行多功能数字钟的设计是本次试验的主要内容。该数字中需包含的功能主要有：分频、校时校分、清零、动态显示、整点报时、闹钟闹铃、秒表以及24小时制和12小时制的转换等。-QuartusII7.0, MATLAB, and SmartSOPC experimental system for the design of multi-function digital clock is the main content of the t
ee2
- 多功能时钟，可预设时间，可预设闹钟，可调数码管亮度，选择调整时，数码管被选中位会闪动-Multi-clock, preset time, preset alarm clock, adjustable LED brightness, select the adjustment, LED will flash the selected bit
Project-Clock-plus-alarm
- 实现超多功能数字钟的vhdl硬件实现，可以实现校时校分闹铃，多模切换，多模同时工作-Ultra-versatile digital clock vhdl hardware implementation can be achieved when the school hours the school alarm, multi-mode switching, multi-mode simultaneously
shuzizhong
- 基于vhdl的具备闹钟提醒的多功能数字钟设计与应用-The alarm clock to remind vhdl-based multi-functional digital clock design and application
clock
- 多功能数字钟 24小时计时 整点报时功能 闹钟设置功能 校时 复位等-Multi-function digital clock 24 hours to strike the alarm clock on the hour function when the reset function, etc
clock--the-end
- 多功能数字钟 24小时计时 整点报时功能 闹钟设置功能 校时 复位等-Multi-function digital clock 24 hours to strike the alarm clock on the hour function when the reset function, etc
clock
- 用 Verilog HDL 设计一个多功能数字钟，包含以下主要功能： 1） 计时，时间以 24 小时制显示； 2） 校时； 3） 闹钟：设定闹钟时间，可利用 LED 闪烁作为闹钟提示； 4） 跑表：启动、停止； 5） 其他。-Using Verilog HDL design a multi-functional digital clock contains the following main functions: 1) time, the time is displayed