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zhuanpan.rar
- 增量式光电编码器输出四分频脉冲计数，分别为A，B两路信号,Incremental optical encoder pulse count output frequency of a quarter, namely A, B two-way signal
coder_counter
- 增量式光电编码器计数器的FPGA实现程序,verilog3段式FSM,异步加载.-Incremental Optical Encoder counter program FPGA implementation, verilog3 struts FSM, asynchronous load.
statemachine
- 基于状态图的光电编码器4倍频vhdl程序，输入相位差90度的两相，输出倍频和方向信号-Based on the state of the optical encoder Figure 4 multiplier vhdl procedure, enter a 90-degree phase difference of two-phase, frequency and direction of the output signal
52250440605_AB
- 基于CPLD 的光电脉冲码盘 信号四倍频电路设计-CPLD-based electro-optical pulse encoder signals four multiplier circuit design
s_UIC_v3.03.tar
- (IBM) Interrupter Controller for PowePC405 (verilog)
CPLD_RP
- 基于CPLD，计数功能，可将光电编码器的光电信号计数送至并行端口-Based on CPLD, counting function, optical encoder can be counted optical signal sent to the parallel port
AB-4F
- 基于CPLD 的四倍频辩向电路设计-24位计数 8位单片机数据输出-Based on the CPLD optical pulse encoder signal multiplier circuit design
rligght_telege
- 实光电码盘的输出数据的四倍倍频，使码盘输出精度提高四倍。-Four times the multiplier of the output data of the real optical encoder, the encoder output precision increased by four times.
encoder
- 使用VHDL编写的光电编码器。并且在quartus软件进行仿真。最终下载在FPGA板上实现光电编码器的使用。-Optical encoder using VHDL written. And quartus software simulation. The final use of photoelectric encoder download FPGA board.