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Vhdl-Parser-0.12.tar
- 這是一個VHDL的parser目前版本為0.12
verilog-Perl-3.120.tar
- Verilog Parser in Perl
Hardware-Verilog-Parser-0.13.tar
- verilog code genrator
b
- 递归下降分析器的设计 首先将文法改写成EBNF形式，根据递归下降分析法基本思想编写程序。 -The design of recursive descent parser rewrite first EBNF grammar forms, according to the basic idea recursive descent analysis programming.
robust_fir_latest.tar
- RobustVerilog generic FIR filter In order to create the Verilog design use the run.sh scr ipt in the run directory (notice that the run scr ipts calls the robust binary (RobustVerilog parser)). The filter can be built according to 3 differe
Uart_to_bus
- The UART to Bus IP Core is a simple command parser that can be used to access an internal bus via a UART interface. The parser supports two modes of operation: text mode commands and binary mode commands. Text mode commands are designed to be used wi
verilog-midi-reader-master
- MIDI file parser that converts song and lyric data to Verilog ROM format for use on an FPGA